Speculative execution control with programmable indicator...

Details Speculative execution control with programmable indicator... Speculative execution control with programmable indicator...

2005-02-08

2005-02-08

Kim, Kenneth S. (Department: 2111)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

C711S147000, C711S210000, C712S225000

Reexamination Certificate

active

06854048

ABSTRACT:
Mechanisms and techniques operate in a computerized device to enable or disable speculative execution of instructions such as load instructions on one or more processors in the computerized device. The mechanisms and techniques can execute a set of instructions on a processor in the computerized device and can detect a value of a speculation indicator. If the value of the speculation indicator indicates that speculative execution of load instructions is allowed in the computerized device, the mechanisms and techniques allow speculative execution of load instructions in the processor, whereas if the value of the speculation indicator indicates that speculative execution of load instructions is not allowed in the computerized device, the mechanisms and techniques do not allow speculative execution of load instructions in the processor. An instruction in code can turn on and off the speculation indicator, which can be one or more bits in a control register or in page table entries associated with pages of memory. Under certain conditions, speculative execution correction mechanisms can be enabled, disabled or removed from a processor.

REFERENCES:
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patent: 5615350 (1997-03-01), Hesson et al.
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Bershad, Brian et al. “Fast Mutual Exclusion for Uniprocessors”, ACM Sigplan Notices: vol. 27, Issue 9 (Sep. 1992).

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