Speculative and committed resource files in an out-of-order proc

Details Speculative and committed resource files in an out-of-order proc Speculative and committed resource files in an out-of-order proc

1994-01-04

1997-05-06

Eng, David Y.

Boots, shoes, and leggings

36423222, 36493102, G06F 934

Patent

active

056279850

ABSTRACT:
A speculative execution out of order processor comprising a reorder circuit containing a plurality of physical registers that buffer speculative execution results for integer and floating-point operations, and a real register circuit containing a plurality of committed state registers that buffer committed execution results for either integer or floating-point operations, depending on the register. The reorder and real register circuits read the speculative and committed source data values for incoming micro-ops, and transfer the speculative and committed source data values over to a micro-op dispatch circuit over a common data path. A retire logic circuit commits the speculative execution results to an architectural state by transferring the speculative execution results from the reorder circuit to the real register circuit.

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V. Popescu, et al., "The Metaflow Architecture", IEEE Micro, 1991, pp. 10-13, and 63-73.
Mike Johnson, "Superscalar Microprocessor Design", Prentice Hall, 1991.

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