SPDT switch and communication unit using the same

Details SPDT switch and communication unit using the same SPDT switch and communication unit using the same

2001-01-16

2004-02-17

Pascal, Robert (Department: 2817)

Wave transmission lines and networks

Plural channel systems

Having branched circuits

C333S101000, C333S262000, C455S078000

Reexamination Certificate

active

06693498

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an SPDT (single pole double throw) switch, and a communication unit using the same. More particularly, the present invention relates to an SPDT switch for use in a mobile communication unit as an antenna switch, and to a communication unit using the same.
2. Description of the Related Art
Recent demands to reduce the size and cost of mobile communication units require that single pole double throw (SPDT) switches used as antenna switches be reduced in size and cost. An SPDT switch is a switch having three terminals, one of which is connectable to either of the other two terminals.
FIG. 7
is a circuit diagram showing a conventional SPDT switch disclosed in Japanese Unexamined Patent Application Publication No. 9-23101.
Referring to
FIG. 7
, an SPDT switch
1
includes a first terminal P
1
, a second terminal P
2
, a common terminal P
3
, a first field-effect transistor (FET) Q
1
, a second FET Q
2
, a first inductor L
1
, a second inductor L
2
, resistors R
1
, R
2
, and R
3
, a first control terminal P
4
, a second control terminal P
5
, and a third control terminal P
6
. The source of the first FET Q
1
is connected to the first terminal P
l
, and the source of the second FET Q
2
is connected to the second terminal P
2
. The drain of the first FET Q
1
and the drain of the second FET Q
2
are connected to each other, and are connected to the common terminal P
3
. The first inductor L
1
is connected across the drain and source of the first FET Q
1
, and the second inductor L
2
is connected across the drain and source of the second FET Q
2
. The gate of the first FET Q
1
is connected to the first control terminal P
4
via the resistor R
1
, and the gate of the second FET Q
2
is connected to the second control terminal P
5
via the resistor R
2
. The drain of the first FET Q
1
and the drain of the second FET Q
2
are connected to the third control terminal P
6
via the resistor R
3
. Each of the first FET Q
1
and the second FET Q
2
has a pinch-off voltage set at −0.5 V. Symbol “D” in
FIG. 7
represents the drain.
In the SPDT switch
1
having such a construction, potentials of 0 V, 0 V, and −3 V are applied to the first control terminal P
4
, the second control terminal P
5
, and the third control terminal P
6
, respectively. Then, the first FET Q
1
has a potential of 0 V at the drain and source, and the gate-drain (or gate-source) voltage is 0 V, thereby turning on the first FET Q
1
. The second FET Q
2
also has a potential of 0 V at the drain and source, and the gate-drain (or gate-source) voltage is −3 V, which is less than the pinch-off voltage, thus turning off the second FET Q
2
. In the off state, the second FET Q
2
has an off-capacitance across the drain and source. The inductance of the second inductor L
2
is set so that the second inductor L
2
may form a parallel resonance with the off-capacitance of the second FET Q
2
having a resonant frequency synchronous with the frequency of an undesired signal. In theory, infinite impedance is thus obtained across the drain and source of the second FET Q
2
at the frequency of such an undesired signal. Therefore, an electrical connection is established between the first terminal P
1
and the common terminal P
3
via the first FET Q
1
, and no electrical connection occurs between the second terminal P
2
and the common terminal P
3
because infinite impedance is obtained at the parallel resonance between the off-capacitance of the second FET Q
2
and the second inductor L
2
.
On the other hand, suppose that potentials of −3 V, 0 V, and 0 V are applied to the first control terminal P
4
, the second control terminal P
5
, and the third control terminal P
6
, respectively. In contrast to the previous description, an electrical connection between the second terminal P
2
and the common terminal P
3
is established via the second FET Q
2
, and no electrical connection occurs between the first terminal P
1
and the common terminal P
3
because infinite impedance is obtained by the parallel resonance between the off-capacitance of the first FET Q
1
and the first inductor L
1
.
The SPDT switch
1
therefore allows either one of the first terminal P
1
and the second terminal P
2
to be electrically connected to the common terminal P
3
by changing the voltages to be applied to the first control terminal P
4
and to the second control terminal P
5
.
However, the SPDT switch
1
shown in
FIG. 7
is disadvantageous in that two potentials of 0 V and −3 V must be alternately applied to the first control terminal P
4
and the second control terminal P
5
. In other words, while 0 V or −3 V is applied to the first control terminal P
4
, −3 V or 0 V must be simultaneously applied to the second control terminal P
5
. Specifically, two control lines adapted to change the potentials to be applied to the respective terminals are required, or otherwise, a single control line branched into two and configured so that either signal may be inverted is required.
In such cases, an increased area may be required for such a control line(s). Otherwise, an extra control port such as a CPU (central processing unit) or logic for allowing a control signal to be inverted may be required, thus, making it difficult to reduce the size and cost of the switch.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides an SPDT switch which can be easily controlled and which is compact, and a communication unit using the same.
To this end, in an aspect of the present invention, an SPDT switch includes first and second terminals, and first and second FETs with Schottky connection gates. The drain of the first FET and the source of the second FET are connected to the first terminal and the second terminal, respectively, and the source of the first FET and the drain of the second FET are connected to the common terminal. A fixed potential &ggr; is applied to the gate of the second FET, and one of potentials &agr; and &bgr; is applied to the gate of the first FET, where &agr;<&ggr;<&bgr;, to allow one of the first and second terminals to be electrically connected to the common terminal. The pinch-off voltage V
p1
of the first FET is set to satisfy 0>V
p1
>&agr;−&ggr;, and the pinch-off voltage V
p2
of the second FET is set to satisfy 0>V
p2
>&ggr;−&bgr;.
The SPDT switch may further include a first inductor connected in parallel to the first FET, and a second inductor connected in parallel to the second FET
1
.
The SPDT switch may further include a first inductor connected in series to the first FET, a first capacitor connected in parallel to the series connection of the first FET and the first inductor, a second inductor connected in series to the second FET, and a second capacitor connected in parallel to the series connection of the second FET and the second inductor.
The SPDT switch may further include a third FET with a Schottky connection gate, having a pinch-off voltage V
p3
set to satisfy 0>V
p3
>&ggr;−&bgr;, and a fourth FET with a Schottky connection gate, having a pinch-off voltage V
p4
set to satisfy 0>V
p4
>&agr;−&ggr;. The third FET may have a drain connected to the drain of the first FET, a source connected to ground via a first ground capacitor, and a gate connected to the gate of the second FET. The fourth FET may have a drain connected to the source of the second FET, and a source connected to ground via a second ground capacitor, and a gate connected to the gate of the first FET.
In another aspect of the present invention, a communication unit contains an SPDT switch such as that described above.
An SPDT switch embodied by the present invention can be easily controlled and reduced in size and cost. Furthermore, a communication unit using such an SPDT switch can also be reduced in size and cost.


REFERENCES:
patent: 5969560 (1999-10-01), Kohama et al.
patent: 6118985 (2000-09-01), Kawakyu et al.

Affiliated with

Also associated with

Rating

SPDT switch and communication unit using the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with SPDT switch and communication unit using the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SPDT switch and communication unit using the same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3341494