Spatial and temporal selective laser assisted fault...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S750010

Reexamination Certificate

active

06967491

ABSTRACT:
A method and apparatus for laser-assisted fault mapping which synchronizes the laser control with the tester unit. The inventive method provides for laser-assisted pseudo-static fault mapping to localize defects in a device whose inputs are being stimulated dynamically by a tester. It further provides for laser-assisted dynamic soft error mapping, to localize in terms of location and to correlate with respect to a specific test vector, sensitive areas in a device by utilizing device performance criteria such as pass-fail status outputs. The apparatus includes a fully controllable dynamic laser stimulation apparatus connected to a control unit that provides complete synchronization with a tester unit.

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patent: 6078183 (2000-06-01), Cole, Jr.
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patent: 6483326 (2002-11-01), Bruce et al.
patent: 6546513 (2003-04-01), Wilcox et al.
patent: 6549022 (2003-04-01), Cole, Jr. et al.
Bruce et al., “Soft Defect Localization (SDL) on ICs”, Proceedings From the 28thInternational Symposium for Testing and Failure Analysis (ISTFA), pp. 21-27, Nov. 3-7, 2002.
Bruce et al., “Soft Defect Localization (SDL) on ICs”, Proceedings From the 28thInternational Symposium for Testing and Failure Analysis (ISTFA), pp. 21-27, Nov. 3-7, 2002.
Rowlette et al., Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA), ITC International Test Conference, pp. 264-273, 2003, no month.

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