Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
2001-03-29
2002-09-17
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
Reexamination Certificate
active
06452205
ABSTRACT:
FIELD OF INVENTION
The present invention pertains to devices that operate through the conduction of a very small number of electrical carriers and to methods of fabricating the devices.
BACKGROUND OF THE INVENTION
A relatively recent development in material science has been the ability to fabricate structures that are small on a quantum scale. On this small scale, 200 Å or less, the applicable physics is no longer that of the solid state bulk nor that of the gaseous free atom, but rather that of a quantum confined intermediate. Early in the development these small scale structures were formed in layers with confinement in one dimension only. The confined structures are typically composed of thin layers produced by MBE equipment on GaAs or other active substrates.
As an example of a use of these thin layers, lasers have been made that utilize the quantum confinement layers for carrier confinement or refractive optical confinement. In quantum-mechanically confined nanostructures, the degree of freedom in the free-electron motion decreases as N, the number of confined dimensions, goes up. This change in the electronic density of states has long been predicted to increase efficiency and reduce temperature sensitivity in lasers, and has been demonstrated for N=1 and N=2. The techniques for the production of very thin layers of material with reasonable electronic mobilities require very meticulous crystal growth and exceedingly high purity.
For the ultimate case of N=3, there is also the occurrence of Coulomb blockade, a phenomenon that provides the basis for the operation of single-electron devices. Generally, a 3-D confined nanostructure is a small particle of material, e.g., semiconductor material, that is small enough to be quantum confined in three dimensions. That is, the quantum contained particle has a diameter that is only about 200 Å or less. This creates a three dimensional well with quantum confinement in all directions.
Traditionally, attempts to fabricate 3-D confined nanostructures relied on e-beam lithography. More recently, STM/AFM and self-assembled quantum dots (3-D confined nanostructures) have been fabricated. However, incorporating the 3-D confined nanostructures into a useful device is very difficult and has not been accomplished in a manufacturable process.
Accordingly, it would be very beneficial to be able to efficiently manufacture 3-D confined nanostructures in a useful device.
It is a purpose of the present invention to provide 3-D confined nanostructures in a useful device.
It is another purpose of the present invention to provide a new and efficient method of manufacturing 3-D confined nanostructures.
SUMMARY OF THE INVENTION
The above problems and others are at least partially solved and the above purposes and others are realized in a sparse-carrier device including a supporting layer having a surface, a crystal structure epitaxially grown on the surface of the supporting substrate, the crystal structure formed of a first material and having a crystallographic facet with a width and a length substantially parallel with the supporting layer and quantum dots formed of a second material and positioned substantially in at least one row on the crystallographic facet. The row of quantum dots extends along the length of the crystallographic facet and is at least one quantum dot wide and a plurality of quantum dot long, the number of rows of quantum dots being determined by the width of the crystallographic facet. A row of quantum dots forms a building block for circuits based on sparse or single electron devices. Generally, electrical connections may be provided to the row of quantum dots for the passage of electrical carriers or the propagation of changes in polarization states therealong, depending upon the operation.
REFERENCES:
patent: 5614435 (1997-03-01), Petroff et al.
patent: 5730798 (1998-03-01), Shiralagi
Goronkin Herbert
Shiralagi Kumar
Tsui Raymond K.
Chaudhuri Olik
Koch William E.
Motorola Inc.
Wille Douglas A.
LandOfFree
Sparse-carrier devices and method of fabrication does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Sparse-carrier devices and method of fabrication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sparse-carrier devices and method of fabrication will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2836432