Space vector data path

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Details

395570, 36423221, 3642319, 364DIG1, G06F 1580

Patent

active

057782415

ABSTRACT:
A space vector data path for integrating SIMD scheme into a general-purpose programmable processor. The programmable processor uses a mode field in each instruction to specify, for each instruction, whether an operand is processed in either one of vector or scalar modes. The programmable processor also has a plurality of sub-processing units for receiving the operand and, responsive to an instruction as specified by the mode field in each instruction, for processing the operand in either one of the vector or scalar modes, wherein the vector mode indicates to the plurality of sub-processing units that there are a plurality of elements within the operand and the scalar mode indicates to the plurality of sub-processing units that there is but one element within the operand. For the vector mode, each element is processed by one of the sub-processing units concurrently to generate a vector result. For the scalar mode, the sub-elements of the one element operand are processed by the sub-processing units concurrently but independently to generate a scalar result.

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New PA-RISC Processor Decodes MPEG Video, HP's PA-7100LC Uses New Instructions to Eliminate Decoder Chip, Microprocessor Report Jan. 24, 1994, pp. 16-17.

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