Space-saving packaging of electronic circuits

Details Space-saving packaging of electronic circuits Space-saving packaging of electronic circuits

2006-07-04

2006-07-04

Wilczewski, Mary (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S698000, C257S777000

Reexamination Certificate

active

07071546

ABSTRACT:
An apparatus and packaging method for stacking a plurality of integrated circuit substrates, i.e., substrates having integrated circuits formed as integral portions of the substrates, which provides interconnection paths through the substrates to simplify electrical connections between the integrated circuits while facilitating minimization of the volume and customization of the three dimensional package size to conform to the available internal space within a housing, e.g., one used in an implantabie device where package volume is at a premium. Furthermore, an internal cavity can be created by the stacked formation that is suitable for mounting of a surface mount device, e.g., a crystal or the like.

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