Excavating
Patent
1991-06-03
1994-05-03
Teska, Kevin J.
Excavating
371 221, H04B 1700
Patent
active
053094476
ABSTRACT:
Compaction of the response signals produced by separate sets of sub-circuits (12.sub.i) within a digital circuit (10) under test is accomplished by first analyzing each response signal produced by a corresponding set of sub-circuits (by way of a logic analyzer (16,18)) to determine if the response signal has a particular pattern. A pattern bit is then set in accordance with the response signal which has the particular pattern. The pattern bits are then compacted by a set of daisy-chained time compactors (20), each compactor serving to exclusively OR the pattern bit from a corresponding logic analyzer (16,18) with a compacted bit generated previously by an upstream compactor.
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Moskowitz Marsha R.
Wu Eleanor
AT&T Bell Laboratories
Levy Robert B.
Teska Kevin J.
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