Source synchronous I/O bus retimer

Details Source synchronous I/O bus retimer Source synchronous I/O bus retimer

2007-10-09

2007-10-09

Tse, Young T. (Department: 2611)

Pulse or digital communications

Repeaters

Including pulse regeneration or conversion

C375S214000, C375S376000

Reexamination Certificate

active

10626228

ABSTRACT:
A device configured to recover and repeat source synchronous data. The device is configured to receive source synchronous data via a first interface and recover the received data utilizing a first clock signal which is generated to be approximately ninety degrees out of phase with the received clock signal. A second clock signal is generated to be in phase with the received source synchronous clock signal. The second clock signal is the utilized to select a newly generated clock signal and latched data for transmission in a source synchronous manner. The device is further configured to shift the phase of the generated first clock signal to be approximately ninety degrees out of phase with the received data signal.

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U.S. Appl. No. 10/117,427, filed Apr. 5, 2002.

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