Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1988-08-23
1989-12-05
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307446, 307450, 307570, H03K 1994
Patent
active
048854808
ABSTRACT:
A high speed logic circuit having extremely low propagation delays, suitable for implementation in III-V technology. A logic stage provides the desired logic function by combining a predetermined number of input FETs. The drains of the input FETs couple to a pull-up FET and form a first intermediate output of the logic stage. The sources of the input FETs couple to a pull-down FET and form a second intermediate output of the first stage. A second stage, or buffer stage, responding to the intermediate outputs of the first stage, provides sufficient drive to an output terminal of the logic gate to drive multiple loads (gates) coupled thereto. The second stage includes a pull-down FET responsive to the second intermediate output of the first stage. The second stage also includes alternative combinations of FETs and diodes to pull-up the voltage on the output terminal of the logic gate.
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Faris Aziz I.
Robertson Perry J.
American Telephone and Telegraph Company AT&T Bell Laboratories
Hudspeth David
McLellan S. W.
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