Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-07-26
2004-12-14
Nguyen, Jimmy H. (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S690000, C345S089000
Reexamination Certificate
active
06831620
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a source driver for Co generating gray scale voltages supplied to source lines depending on data signals, a source line drive circuit using the source driver, and a matrix display device using the source driver and the source line drive circuit. Particularly, the invention relates to a source driver used for a display device, such as a liquid crystal display device, which is required to be driven by AC voltages because pixels constituting the display screen of the display device may be deteriorated or broken if DC voltages are applied thereto, and the invention also relates to a source line drive circuit using the source driver and to a display device comprising the source driver and the source line drive circuit.
2. Description of the Related Art
In recent years, active-matrix liquid crystal display devices capable of attaining fine display on a large screen have been developed increasingly. In the above-mentioned active-matrix liquid crystal display devices, a configuration wherein a thin-film transistor (TFT) array is formed by a thin-film technology on one of a pair of substrates holding a liquid crystal therebetween has been adopted widely.
FIG. 9
is a circuit diagram showing an example of an equivalent circuit of each pixel in a conventional active-matrix liquid crystal display device. Each pixel is provided corresponding to the intersection of a source line
4
and a gate line
5
disposed so as to be orthogonal to each other as shown in
FIG. 9. A
TFT formed by using amorphous silicon or the like for example is provided at each pixel, the gate line
5
is connected to the gate electrode of the TFT, and the source line
4
is connected to the source electrode of the TFT. A liquid crystal cell capacitance C
LC
, an auxiliary capacitance C
S
and a parasitic capacitance C
gd
are connected as loads to the drain electrode of the TFT. The above-mentioned parasitic capacitance C
gd
is generated by the capacitance coupling between the gate line
5
and the drain electrode used as a display electrode. The terminals of the liquid crystal cell capacitance C
LC
and the auxiliary capacitance C
S
, not connected to the drain electrode of the TFT, are connected to a common electrode (not shown) on an opposite substrate, and a common electrode voltage V
COM
is applied to the terminals. In the above-mentioned configuration, a predetermined voltage depending on a data signal is written at the liquid crystal cell capacitance C
LC
and the auxiliary capacitance C
S
during a scanning period, thereby attaining predetermined gray scale display.
When an electric field having a constant direction is kept applied to a liquid crystal for a long time, the liquid crystal deteriorates because of its electrochemical property. For this reason, it is necessary to drive the liquid crystal so that the direction of the electric field to be applied to the liquid crystal is reversed periodically. In a dot inversion system, a gray scale voltage V
X
output from a source driver is reversed based on a polarity reversal signal REV so as to be centered with respect to the common electrode voltage V
COM
and this alternating voltage drives a liquid crystal cell.
The liquid crystal cell voltage V
LC
generating at the liquid crystal capacitance C
LC
when the gray scale voltage V
X
is applied is a voltage difference between the common electrode voltage V
COM
and the gray scale voltage V
X
supplied from the source line
4
via the source electrode and the drain electrode of the TFT, provided that the effect of the parasitic capacitance C
gd
is ignored. In actual operation, however, it is impossible to ignore the parasitic capacitance C
gd
.
The effect of the parasitic capacitance C
gd
upon the drive of the pixel will be described below referring to FIG.
10
.
FIG. 10
shows the waveform of a scanning voltage V
Y
supplied to the gate line
5
, the waveform of the gray scale voltage V
X
output from the source driver, the waveform of the polarity reversal signal REV, the waveform of the common electrode voltage V
COM
and the waveform of the liquid crystal cell voltage V
LC
generated by these voltages at the liquid crystal cell capacitance C
LC
. As shown in
FIG. 10
, when a selection pulse is applied to the gate electrode of the TFT via the gate line
5
, the TFT is turned on. The gray scale voltage V
X
applied to the source line
4
is sent from the source electrode via the drain electrode to the liquid crystal cell capacitance C
LC
and the auxiliary capacitance C
S
used as the loads of the TFT. As a result, the liquid crystal cell voltage V
LC
rises in synchronization with the selection pulse. The voltage at the time when the selection pulse falls (hereinafter referred to as a final writing voltage) is retained by the liquid crystal cell capacitance C
LC
and the auxiliary capacitance C
S
. In reality, however, a level shift &Dgr;V occurs between the final writing voltage and the retaining voltage after the turning off of the TFT because of the effect of the redistribution of charges to the parasitic capacitance C
gd
.
The level shift &Dgr;V acts to decrease the retaining voltage so that the retaining voltage becomes lower than the final writing voltage in the case where the liquid crystal cell voltage V
LC
is positive just as in a scanning period T
1
shown in FIG.
10
. In the case where the liquid crystal cell voltage V
LC
is negative just as in a scanning period T
2
, however, the level shift &Dgr;V acts to increase the retaining voltage so that the retaining voltage becomes higher than the final writing voltage.
As a result, the effective value of the liquid crystal cell voltage V
LC
in the scanning period T
1
differs from that in the scanning period T
2
, whereby a DC voltage is applied to the liquid crystal, thereby deteriorating the liquid crystal. In addition, since the value of the positive voltage applied to the liquid crystal differs from the value of the negative voltage applied thereto, the luminance of the liquid crystal differs depending on the voltage value, thereby causing flicker in image display. To solve this problem, it has conventionally been proposed that the common electrode voltage V
COM
should be shifted by the same amount as that of the level shift &Dgr;V so that the effective value of the positive liquid crystal cell voltage V
LC
is equal to the effective value of the negative liquid crystal cell voltage V
LC
.
The level shift &Dgr;V occurs because of the existence of the parasitic capacitance C
gd
as described above. When the amplitude of the scanning voltage V
Y
is V
G
the level shift &Dgr;V is represented by the following expression 1:
&Dgr;
V=
(
C
gd
/(
C
gd
+C
LC
+C
S
))·
V
G
(1)
When the cell gap is d, the area of the display electrode is A, the specific dielectric coefficient of the liquid crystal material is &egr;
LC
, and the dielectric coefficient of free space is &egr;
0
, the liquid crystal cell capacitance C
LC
is represented by the following expression 2:
C
LC
=(&egr;
LC
·&egr;
0
/d
)·
A
(2)
The specific dielectric coefficient &egr;
LC
of the liquid crystal material changes depending on the arrangement state of liquid crystal molecules, that is, depending on the liquid crystal cell voltage V
LC
. Therefore, the liquid crystal cell capacitance C
LC
is given as a function f1 of the liquid crystal cell voltage V
LC
and represented by the following expression 3. K
1
is a constant.
C
LC
=K
1
·f
1 (3)
Therefore, the level shift &Dgr;V is also given as a function f2 of the liquid crystal cell voltage V
LC
and represented by the following expression 4.
K
2
is a constant.
&Dgr;
V=K
2
·f
2(
V
LC
) (4)
Furthermore, the light transmittance of the liquid crystal changes nonlinearly with respect to the magnitude of the liquid crystal cell voltage V
LC
. In other words, since the effective value of the liquid crystal cell voltage V
LC
differs at each gray scale level when atta
Nishikubo Keishi
Yanagi Toshihiro
Conlin David C.
Edwards & Angell LLP
Nguyen Jimmy H.
Sharp Kabushiki Kaisha
Tucker David A.
LandOfFree
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