Fishing – trapping – and vermin destroying
Patent
1987-09-16
1988-07-12
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 30, 437 34, 437 44, 148DIG82, 148DIG106, 357 233, 357 239, H01L 21265
Patent
active
047570261
ABSTRACT:
A method of forming complementary metal oxide semiconductor field-effect transistors (CMOSFET) is described wherein the source and drain regions are disposed by ion implantation in a manner substantially perpendicular to the substrate surface in two steps, such that the concentration of impurities increases with lateral distance away from the gate electrode member to suppress the hot e injection, to prevent channeling effects, to increase punch through voltage and to increase gate-aided breakdown voltage.
REFERENCES:
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4536944 (1985-08-01), Bracco et al.
patent: 4642878 (1987-02-01), Maeda
Ghandhi, VLS1 Fabrication Principles, John Wiley and Sons, 1983, p. 230.
Hokelek Ender
Holler Mark A.
Lee Sandra S.
Woo Been-Jon
Hearn Brian E.
Intel Corporation
Wilczewski M.
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