Source-coupled FET logic circuit

Details Source-coupled FET logic circuit Source-coupled FET logic circuit

1991-05-07

1993-01-05

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307450, H03K 19017, H03K 1920

Patent

active

051773783

ABSTRACT:
A source-coupled FET logic (SCFL) circuit having a switching section and a source-follower section. The switching section receives two input signals, and out puts two signals, which are at complementary levels, to the source-follower section. The source-follower section comprises two FETs, two level-shifting circuits, a current source, and two capacitors. The first and second FETs receive at their gates the two signals output by the switching section, respectively. The first and second level-shifting circuits are connected to the sources of the first and second FETs, respectively. Either level-shifting circuit comprises n diodes connected in series. The two capacitors are connected in parallel to the first and second level-shifting circuits, respectively.

REFERENCES:
patent: 4558235 (1985-12-01), White et al.
patent: 4663543 (1987-05-01), Sitch
patent: 4701646 (1987-10-01), Richardson
patent: 4814835 (1989-03-01), Tung
patent: 4963948 (1990-10-01), Awano
patent: 5021857 (1991-06-01), Suehiro

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