Sorting circuit for three or more inputs

Details Sorting circuit for three or more inputs Sorting circuit for three or more inputs

1981-02-05

1983-10-18

Malzahn, David H.

Boots, shoes, and leggings

3401462, G06F 700

Patent

active

044109601

ABSTRACT:
A sorting circuit for sorting three inputs representative of numerical values into first through third outputs representative of the values in the ascending order, checks three binary bits of input sequences supplied thereto at a time from the most significant bit. When only one of the three checked bits is found to be logic "0" and logic "1" for the first time, the sequence including the only one bit represents the minimum and the maximum, respectively. As soon as only one of two bits of the sequences except for the sequence representative of the minimum is subsequently found to be logic "1," the sequence including the only one subsequently found bit represents the maximum. In this manner, the circuit produces the outputs. It is possible to form an array of such three-input-output sorting circuits and conventional two-input-output sorting circuits for use in sorting a multiplicity of inputs. A similar array can be formed for inputs, an integral multiple of four in number, by four-input-output sorting units, each supplied with two sets of ascendingly ordered inputs. The inputs are supplied to the array through a plurality of two-input-output sorting units. The last-mentioned sorting circuit can be formed to be operable either in bit series or in bit parallel.

REFERENCES:
patent: 2984822 (1961-05-01), Armstrong et al.
patent: 2984824 (1961-05-01), Armstrong et al.
patent: 3418632 (1968-12-01), Batcher
patent: 3428946 (1969-02-01), Batcher
patent: 3587057 (1971-06-01), Armstrong

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