Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2008-11-20
2011-10-18
Levin, Naum (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C714S724000, C703S002000
Reexamination Certificate
active
08042073
ABSTRACT:
Embodiments of the present invention provide for sorted data signature analysis for identifying outliers in datasets. Some embodiments disclose a nearest pattern smallest delta procedure to identify outliers in a dataset of vector patterns. Other embodiments disclose a nearest neighbor smallest delta procedure to identify outliers among values from dies in a wafer. Still other embodiments may be disclosed and claimed.
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Levin Naum
Marvell International Ltd.
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