SONET path/ATM physical layer transmit/receive processor

Details SONET path/ATM physical layer transmit/receive processor SONET path/ATM physical layer transmit/receive processor

1996-10-25

2000-03-21

Ngo, Ricky

Multiplex communications

Network configuration determination

370395, H04L 1256

Patent

active

060410434

ABSTRACT:
A SONET path/ATM physical layer transmit/receive processor ASIC for OC-48 makes use of a 32-bit wide interface between a source/destination and the rest of the processor. Adjacent the interface is an ATM cell processor, and between the ATM cell processor and a transmission medium is a SONET payload processor. Selectors are located between the transmission medium and the SONET payload processor, the SONET payload processor and the ATM cell processor, and the ATM cell SONET path/ATM physical layer path, an ATM physical layer path or a fast FIFO buffer path according to the configuration of the selectors determined by user commands from a command logic circuit coupled to each of the interface, ATM cell processor and the SONET payload processor.

REFERENCES:
patent: 5341376 (1994-08-01), Yamashita
patent: 5485456 (1996-01-01), Shtayer et al.
patent: 5537412 (1996-07-01), Shima et al.
patent: 5541926 (1996-07-01), Saito et al.
patent: 5568486 (1996-10-01), Huscroft et al.
patent: 5594724 (1997-01-01), Akata et al.
patent: 5638356 (1997-06-01), Hijikata
patent: 5706285 (1998-01-01), Saijonmaa et al.

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