Multiplex communications – Wide area network – Packet switching
Patent
1989-05-12
1991-03-19
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
3701101, 375116, H04J 306, H04J 312
Patent
active
050017080
ABSTRACT:
An H4 byte generating algorithm is implemented by circuitry which includes counters for generating the H4 byte. The circuit is provisioned to indicate whether it is operating in a terminal multiplexer mode or an add-drop multiplexer mode. In the terminal multiplexer mode the counters are allowed to free run and continually produce successive H4 byte outputs. In the add-drop multiplexer mode selected counter outputs are compared with the received H4 byte and the number of mismatches is accumulated by a mismatch counter. When the mismatch counter reaches a predetermined number the value of the received H4 byte is loaded into the H4 byte counters and the mismatch counter is reset. Each time a proper match between H4 counter outputs and the received H4 byte is sensed, the mismatch counter is reset to 0. The presence of a red alarm will also result in the resetting of the mismatch counter and free running of the H4 byte counters.
REFERENCES:
patent: 4719624 (1988-01-01), Bellisio
patent: 4835768 (1989-05-01), Hubbard et al.
Baydar Ertugrul
Williams Timothy J.
Alcatel NA
Chin Wellington
Olms Douglas W.
Van Der Sluys Peter C.
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