Solid state monolithic switching device

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357 234, 357 49, 357 47, H01L 2702

Patent

active

048735639

ABSTRACT:
A monolithic switching array integrated with control logic on a dielectrically isolated monolithic substrate is provided wherein individual components are constructed in abutment with the oxide walls of the dielectrically isolated wells to form a diffusion/wall interface. As a consequence, area of the wells can be optimally used, and undesired electric fields around the components are minimized, thus allowing for smaller overall chip dimensions as compared with comparable prior art dielectric isolation (d.i.) or junction isolated construction techniques. Moreover, d.i. construction eliminates undesired parasitic devices in a monolithic circuit and allows for improved system accuracy.

REFERENCES:
patent: 4242697 (1980-12-01), Berthold et al.
patent: 4287526 (1981-09-01), Sakuma
patent: 4742380 (1988-05-01), Chang
patent: 4766482 (1988-08-01), Smeltzer

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