Solid-state imaging device with multiple impurity regions...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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Details

C257S230000, C257S233000, C257S435000

Reexamination Certificate

active

06765246

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid-state imaging device and a method for manufacturing the same.
2. Related Background Art
Recently, a solid-state imaging device using a charge coupled device (hereinafter, “CCD” will be referred to) is used widely for applications such as consumer and business video cameras. This solid-state imaging device generally has a structure in which a plurality of photodiodes are arrayed in a matrix on the surface of the semiconductor substrate and a vertical CCD is provided adjacent to each row of the photodiode. It is known that such a solid-state imaging device employs a photodiode with a vertical overflow drain system, that is, a system in which stored excess charges are drained toward the side of the substrate.
FIG. 9
is a cross-sectional view showing a structure of a solid-state imaging device employing a photodiode with a vertical overflow drain system. The solid-state imaging device includes a n-type semiconductor substrate
5
and an overflow barrier region
6
that is a p-type impurity region formed on the n-type semiconductor substrate
5
. A n
−−
-type semiconductor region
7
is formed on the overflow barrier region
6
. Furthermore, on the surface portion of the n
−−
-type semiconductor region
7
, a photoelectric conversion region
8
that is a n
+
-type impurity region is formed and further an electron hole storage region
9
that is a p
++
-type impurity region is formed thereon, thus forming the photodiode. Furthermore, on the surface portion of the n
−−
-type semiconductor region
7
, a channel stop region
12
that is a p
+
-type impurity region is formed between the photodiodes. Note here that the distribution of impurity concentration in the depth direction of the solid-state imaging device is shown in FIG.
10
.
FIG. 11
is a view showing the distribution of an electric potential in the depth direction of the above-mentioned solid-state imaging device. As shown by a broken line in
FIG. 11
, in the photodiode with the vertical overflow drain system, the electric potential is shallow in the overflow barrier region
6
and an electric potential barrier is formed herein. Therefore, an electric potential well is formed in the photoelectric conversion region
8
and electric charges can be stored herein. The amount of electric charges that can be stored in the photoelectric conversion region
8
is set by the bias voltage applied to the n-type semiconductor substrate
5
. Furthermore, by applying the positive voltage that is higher than the bias voltage to the n-type semiconductor substrate
5
, it is possible to increase the electric potential of the overflow barrier region
6
so as to eliminate the electric potential barrier and to drain electric charges stored in the photoelectric conversion region
8
toward the substrate. In the solid-state imaging device employing such an overflow drain system like this, the distance between the photoelectric conversion region and the overflow barrier region is increased so as to deepen the depletion layer, thus making it possible to carry out the photoelectric conversion further in the infrared wavelength and to improve the sensitivity.
SUMMARY OF THE INVENTION
A solid-state imaging device according to one embodiment of the present invention includes a semiconductor substrate, a plurality of photoelectric conversion regions arrayed in the vertical direction and the horizontal direction on the surface of the substrate, and an electric charge transfer region disposed between the photoelectric conversion regions adjacent in the horizontal direction of the substrate. The substrate includes a n-type semiconductor substrate, a first p-type impurity region formed on the n-type semiconductor substrate, a semiconductor region formed on the first p-type impurity region, and a second p-type impurity region disposed below the electric charge transfer region. The photoelectric conversion region and the electric charge transfer region are n-type impurity regions formed on the surface portion of the semiconductor region. A third p-type impurity region is formed in at least one region selected from the group consisting of a region located between the photoelectric conversion regions adjacent in the vertical direction and a region located below the second p-type impurity region between the photoelectric conversion regions adjacent in the horizontal direction in the semiconductor region.
Furthermore, a method for manufacturing the solid-state imaging device according to one embodiment of the present invention is a method for manufacturing the solid-state imaging device. The method includes the following steps of: (a) forming a first p-type impurity region and a semiconductor region on a n-type semiconductor substrate in this order; (b) forming the photoelectric conversion region that is a n-type impurity region and the electric charge transfer region that is an n-type impurity region on the surface portion of the semiconductor region; (c) forming a second p-type impurity region below the electric charge transfer region; and (d) forming a third p-type impurity region in at least one region selected from the group consisting of a region located between the photoelectric conversion regions adjacent in the vertical direction and a region located below the second p-type impurity region between the photoelectric conversion regions adjacent in the horizontal direction in the semiconductor region.


REFERENCES:
patent: 5514887 (1996-05-01), Hokari
patent: 6403994 (2002-06-01), Wada
patent: 6465821 (2002-10-01), Yoshida et al.
patent: 6521920 (2003-02-01), Abe
patent: 8-222719 (1996-08-01), None
patent: 11-289076 (1999-10-01), None

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