Solid-state imaging device with fast clock speed for improved im

Electrical pulse counters – pulse dividers – or shift registers: c – Charge transfer device – Particular input or output means

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257234, 257239, 257248, G11C 1928, H01L 27148, H01L 29768

Patent

active

055286429

ABSTRACT:
A CCD linear sensor as a solid-state imaging device has a photosensor and a pair of CCD registers connected to the photosensor. One of the CCD registers is supplied with first two-phase transfer clock signals for transferring electric charges from the photosensor to a first signal converter, and the other CCD register is supplied with second two-phase transfer clock signals for transferring electric charges from the photosensor to a second signal converter. The second two-phase transfer clock signals are shifted a 1/2 clock period from the first two-phase transfer clock signals. The CCD registers have the same number of dummy registers on their output ends for transferring the electric charges therethrough to the first and second signal converters, which convert the transferred electric charges into output signals that are in phase with each other. The periods of the output signals and the negative-going edges, i.e., the transitions, of reset pulses applied to the gates of FETS connected to the first and second signal converters are separate in time from each other, preventing coupling-induced noise from being included in the signal periods. The clock signals can thus be generated at a higher frequency and at a higher speed, making it possible to process the image signals at a higher frequency and at a higher speed.

REFERENCES:
patent: 4540901 (1985-09-01), Suzuki
patent: 4807037 (1989-02-01), Iesaka et al.
patent: 4985760 (1991-01-01), Maeshima et al.
patent: 5113254 (1992-05-01), Kanno et al.
IEEE Spectrum vol. 10, No. 6, Jun. 1973, New York US p. 65 `New product applications: first commercial CCD unveiled, a 1.times.500-element image sensor` *figure 2*.

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