Solid state imaging device having overflow drain region

Details Solid state imaging device having overflow drain region Solid state imaging device having overflow drain region

1999-03-17

2001-06-05

Ho, Tuan (Department: 2612)

Television

Camera, system and detail

Solid-state image sensor

C348S311000

Reexamination Certificate

active

06243135

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid stage imaging device and, more particularly, to a solid state imaging device having a charge expelling part region or an overflow drain region formed adjacently to a horizontal charge transfer part.
2. Description of the Related Art
A solid state imaging device has conventionally been used as a camera-integrated video tape recorder (VTR). As the number of pixels is increased in these years, the solid state imaging device has begun to be used as an input device to an electronic still camera for, in place of film exposure, converting optical information to electric signal and storing the signal in a memory medium to produce hard copy output or to observe it on the screen of a monitor.
In such a solid state imaging device, there exists unnecessary signal charge in a photoelectric converter part or in vertical and horizontal charge transfer parts. When the solid state imaging device is used as an input device to the camera-integrated VTR, since such unnecessary signal charge settles down, after display for a time corresponding to several display screens, to an insignificant level, the unnecessary charge does not present a big problem. When the solid state imaging device is used as an input device to an electronic still camera, however, there exists a time lag after a shutter button is triggered until the shutter is actually opened or closed, thus unfavorably losing the optimum shutter pushing timing.
For this reason, in the case of the solid state imaging device used as the input device to the electronic still camera, unlike it is used to the camera-integrated VTR, it becomes necessary to remove all the unnecessary signal charge present in the photoelectric converter part, vertical and horizontal charge transfer parts simultaneously with the triggering of the shutter button.
One of conventional means for removing such unnecessary charge present in the photoelectric converter part is to use blooming control in which a P
−
type semiconductor region having a low concentration is formed directly under an N type semiconductor region forming the photoelectric converter part so that a reverse bias is applied to the N type semiconductor substrate to expel excessive charge to the N type semiconductor substrate; while a vertical overflow drain structure is formed so that the N type semiconductor region per se is depleted to expel all signal charge to the N type semiconductor substrate (refer to a journal of The Institute of Television Engineers of Japan, Vol. 37, No. 10, 1983, pp. 782-787).
Further, with respect to the unnecessary charge present in the horizontal charge transfer part, since the horizontal transfer part can operate at a higher speed, the usual operation enables the unnecessary charge is expelled to a reset drain provided at an end of the horizontal charge transfer part.
Meanwhile, removal of unnecessary charge present in the vertical charge transfer part requires a charge transfer time corresponding to at least one or several display screens.
As a method for removing the unnecessary charge of the vertical charge transfer part, there has been proposed a first method in which a drain for removal of the unnecessary charge is provided at an end of a vertical charge transfer part on the opposite side of a horizontal charge transfer part, a still camera is put in its usable state even when the camera is not in use to previously set an embedded channel of the vertical charge transfer part and a substrate in their reverse biased state to thereby remove the unnecessary charge (Japanese Patent Laid-Open Publication No. 58-31671); a second method in which a drain for removal of unnecessary charge is provided at an end of a vertical charge transfer part CCD opposed to a horizontal charge transfer part to reversely transfer, i.e., remove unnecessary charge on the vertical charge transfer part CCD (Japanese Patent Laid-Open Publication No. 58-31672); or a third method in which a drain is provided in a connection part between horizontal and vertical charge transfer parts and a reset gate is controlled to remove unnecessary charge (Japanese Patent Laid-Open Publication No. 58-31672).
However, these methods have had their defects. That is, the first method has been defective in that, since the vertical charge transfer part is always put in its depleted state, a time taken for removing the unnecessary charge on the vertical charge transfer part becomes very long and a reverse biasing power source must be always applied. The second method has had a disadvantage that the removal of the unnecessary charge is carried out by reversely transferring the unnecessary charge, which undesirably results in that,since the direction of the reverse transfer is different from that of the normal signal charge, this causes local signal loss, leading to a failure thereof (refer to Japanese Laid-Open Publication No. 2-33275). This disadvantage can be undesirably removed only by a complex method for driving the solid state imaging device. Further, the third method requires narrow and fine formation of a control gate and unnecessary charge expelling drain, which makes it difficult to manufacture it. The third method also requires the control gate to be applied with a pulse for controlling it, which leads to the fact that its resultant solid state imaging device must be driven in a complex manner.
To avoid such defects, there has recently been proposed a method in which an unnecessary charge expelling region is formed adjacent to a horizontal charge transfer part so that unnecessary charge of a vertical charge transfer part is removed by forwardly transferring it (refer to Japanese Laid-Open Publication No. 2-205359, No. 62-154881).
FIG. 14
schematically shows an arrangement of a prior art solid state imaging device having an charge expelling part adjacent to a horizontal charge transfer part. The prior art solid state imaging device includes a photoelectric converter part
1101
, a vertical charge transfer
1102
, a horizontal charge transfer
1103
, an output circuit part
1104
, an unnecessary charge expelling part
1105
, and an N
++
type region
1106
connected to a power supply voltage provided at one end of the unnecessary charge expelling part
1105
.
FIG. 15
is a plan view of a region having the unnecessary charge expelling part
1105
adjacent to the horizontal charge transfer
1103
in the prior art, which includes, a vertical charge transfer channel
1201
, a horizontal charge transfer channel
1202
, a potential barrier region
1203
, an unnecessary charge expelling region
1204
, a first horizontal charge transfer electrode
1205
, a second horizontal charge transfer electrode
1206
, and a final vertical charge transfer electrode
1207
.
FIG. 16
shows a cross-sectional view of the prior art solid state imaging device of
FIGS. 14 and 15
taken along a plane I-I′ and a diagram showing its potential. The illustrated cross-sectional view includes an N
−−
type semiconductor substrate
1301
having an impurity concentration of about 2.0×10
14
cm
−3
, a P type well layer
1302
having an impurity concentration of about 1.0×10
16
cm
−3
, an N type semiconductor region
1303
having an impurity.concentration of about 1.0×10
17
cm
−3
and having an embedded or buried channel of vertical and horizontal charge transfer parts and a potential barrier part formed therein, an N
+
type semiconductor region
1305
having an impurity concentration of about 1.0×10
18
cm
−3
formed as the unnecessary charge expelling part, a P
+
type semiconductor region
1307
having an impurity concentration of about 1.0×10
18
cm
−3
formed as an element separator, a first horizontal charge transfer electrode
1205
made of a first polycrystalline silicon layer
1308
, and a final vertical charge transfer electrode
1207
made of a second polycrystalline silicon layer
1309
. N type semiconductor region
1303
directly under

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