Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1999-11-17
2003-01-28
Vu, Ngoc-Yen (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S300000, C257S292000, C250S208100
Reexamination Certificate
active
06512547
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a threshold modulation MOS type solid-state imaging device for use in video cameras, electronic cameras, image input cameras, scanners, and facsimiles, and to a method of detecting optical signals using such solid-state imaging device.
2. Description of the Prior Art
Semiconductor image sensors have been widely used in most image input devices because they can be mass produced using advanced fine patterning techniques. In particular, charge coupled devices (hereinafter referred to as CCDs) are used in various kinds of imaging apparatuses such as video cameras and facsimiles since they have high photo-sensitivity and low noise levels.
However, it is known that CCDs have the drawbacks, such that
(1) they require a large power consumption and an high operating voltage;
(2) they require a rather complicated manufacturing process and are costly as compared with CMOS type devices; and
(3) unlike CMOS devices, they cannot easily incorporate therein a complex peripheral circuit therefor.
On account of these impediments of CCDs to be solved, and because of a recent spread of a need for solid-state imaging devices in the marketplace, MOS type solid-state imaging devices have gained a great deal of attention. In addition, recent advancement of sub-micron CMOS technologies have proved feasibility of the fabrication of sub-micron imaging devices.
It should be noted, however, that conventional MOS type image sensors are inferior to CCD image sensors in performance. For example, MOS type image sensors suffer from random noise and fixed pattern noise. Thus, these principal problems must be overcome in order for MOS type image sensors to be useful.
On the other hand, micro-lens technology has enabled to scale down a photo-sensitive area. Several fine fabrication technologies (micro-technologies) have enabled to construct an integrated transistor amplifier involving two or three transistors for each pixel to result in enhancing the sensitivity of a MOS device. Thus, by the use of such an integrated circuit technology, it is now possible to reduce thermal noise (kTC noise) generating in X or Y MOS switches and fixed pattern noise due to structural non-uniformity of the device elements.
Therefore, a type of active CMOS image sensors, which are equipped with a transistor amplifier fabricated in each pixel of photo-detection portion using a micro-technology, has attracted much attention.
Active CMOS image sensors require no special technology. That is, they enable to easily integrate by ordinary CMOS technology peripheral CMOS circuits and the light sensing element on the single chip, so that they can be manufactured at low cost. In addition, they have advantages that they operate at a low operating voltage and consumes less power.
Thus, active CMOS image sensors are anticipated in near future to play an important role in one-chip cameras equipped with a sophisticated signal processing circuit.
Developments of prior art active CMOS image sensor are discussed in the following references.
(1) Japanese Patent Early Publications Nos. 60-140752, 60-206063, and 6-120473 disclose charge modulation devices (CMDs). A CMD uses a photo-sensitive area converter, which has CCD-like features. The gate electrode of the MOS transistor has a photo-gate electrode structure to improve its fill factor which is a ratio of a light transmitting area to a total area consisting of the light transmitting area and a light shielding area. This device is adapted to control a current passing through the MOS transistor by storing photo-generated charges in a surface of a Si layer below the photo-gate electrode of the MOS transistor.
(2) Japanese Patent Early Publication No. 64-149959 discloses a bulk charge modulated device (BCMD) as shown in FIG.
1
. In this device also, in order to improve the fill factor, the gate electrode
7
of the MOS transistor has a photo-gate electrode structure and incorporates a layer (hereinafter referred to as a charge storing layer) for storing photo-generated charges. The charge storing layer is formed in a p-type well layer
3
on an n-type layer
2
and below the photo-gate electrode
7
as shown in FIG.
1
A. It is noted that in this example the charge storing layer is formed in the p-type well layer
3
below the channel region
9
so as to suppress trapping of the photo-generated charges to surface trap levels in an interface portion between the n-type layer
9
and a gate oxide film
6
in contact with the layer
9
. As a result, the noise caused by the photo-generated charges trapped in the surface trap levels may be suppressed. The MOS transistor shown in
FIG. 1A
also includes a p+-type substrate
1
on which the n-type layer
2
is formed, a source diffusion region
4
and a drain diffusion region
5
which are formed in the p-type well layer
3
at the both sides of the gate electrode
7
, and a constant-current source
8
.
(3) Japanese Patent Early Publication, No. 2-304973 disclosed a threshold voltage modulation type solid-state imaging device which has a ring-shaped gate electrode structure, in which a source diffusion region is formed at the center part surrounded by the ring-shaped gate electrode, and a drain diffusion region is formed so as to surround the source diffusion region and the ring-shaped gate electrode. The drain diffusion region is also extended to the light-detection portion and it serves as a heavily doped buried layer for a buried photo-diode. This example is characterized in that a photo-sensing device is provided outside the transistor and that a potentially minimum region is provided for signal charges, which lies within a well region below the channel region and extends along the entire length of the channel region, but occupies only a part of the entire channel width.
In this solid-state imaging device, the photo-generated charges, that is, electron-hole pairs occur in the buried photo-diode by illuminating it with light, and the charges of one-type of these pairs are stored in the photo-diode and results in a substrate bias or a change in potential of the substrate. The bias is used in controlling the threshold voltage of the MOS transistor. This imaging device is useful especially when the intensity of light is weak wherein only a small amount of charges are generated by light. The photo-generated charges are collected at the potentially minimum region to suppress the non-uniformity in sensitivity of the imaging device and to suppress associated fixed pattern noise.
However, a problem of random noise still remains in CMD type solid-state imaging devices. The random noise is caused by the trapping or scattering of the photo-generated charges in the surface region of the semiconductor, which cannot be removed completely by the above mentioned modifications, since a photoelectric conversion is done in the CMD solid-state imaging device using charges near the surface of the semiconductor.
The BCMD type solid-state imaging device as shown in
FIG. 1A
is used in a source follower connection. In this case, since the charge storing layer
3
lies in the entire channel region underlying the photo-gate electrode
7
, it is difficult to drive the transistor under a sufficiently saturated condition. Consequently, the transistor operates in a triode-region current-voltage characteristic shown in
FIG. 1B
, and thus the BCMD imaging device poses a problem that the photo-generated charges cannot be converted linearly to voltage by the source follower connection to the MOS transistor.
It is noted that, since the carriers in the charge storing layer
3
are distributed throughout the channel region under the photo-gate electrode
7
and since the channel region, as a whole, contributes to a modulation of a current through it, the potential variation is not a linear function of photo-generated charges. Besides, since the resultant capacitance based on the gate oxide film above the charge storing layer
3
is relatively large, so that its conversion efficiency is rather low.
Further, both
Innovision, Inc.
Lorusso & Loud
Vu Ngoc-Yen
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