Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2000-08-31
2004-08-31
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S308000, C348S307000, C257S291000, C438S057000, C365S104000
Reexamination Certificate
active
06784933
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a solid-state imaging device. More specifically, the invention relates to a solid-state imaging device having the memory function of nonvolatile-storing picked-up image information.
2. Description of the Related Background Art
As solid-state imaging device, CCD imaging devices and MOS type imaging devices are known. In the CCD imaging devices, pixel information photoelectric-converted by a light receiving part, such as a photo diode, is transferred in a charge signal state by means of a CCD and read out. In the MOS type imaging devices, pixel information photoelectric-converted by a light receiving part is read out directly to an output line by means of a MOS transistor.
There have been proposed the following examples of these solid-state imaging devices having the memory function of nonvolatile-storing picked-up pixel information:
(1) A structure wherein a nonvolatile memory transistor is provided between a light receiving part and vertical CCD transfer part of a CCD imaging device (Japanese Patent Laid-Open No. H8-340100);
(2) A structure wherein a resistive element connected to a drain of a nonvolatile memory transistor is formed of a photoconductive material to vary a drain applied voltage in accordance with the quantity of light to inject charges corresponding to the quantity of light into a floating gate (Japanese Patent Laid-Open No. H2-237077); and
(3) A structure wherein a control gate of an ultraviolet erasing nonvolatile memory transistor is provided with a light passage to control the quantity of charges, which are injected into a floating gate, in accordance with the quantity of light, with which a channel region is irradiated via the light passage (Japanese Patent Publication No. H1-26193).
In the structure (1), since the nonvolatile memory transistor is arranged between the receiving part and CCD transfer part of a usual frame transfer or inter line transfer type CCD imaging devices, the unit pixel area is large, and the chip area of an image pickup element is also large.
In the structure (2), since the resistive element of a photoconductive film is used, the unit pixel area is large, and it is required to carry out a special process which is not included in a process for producing a usual imaging device or a nonvolatile memory, so that the producing process is complicated.
The structure (3) is a special structure wherein the control gate is provided with the light passage, so that it is not easily produced. In addition, since this structure utilizes the hot electron injection in the writing system, it is difficult to actually control the hot electron injection by the amount of light from the light passage which is formed in the control gate, so that this structure is not put to practical use.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to eliminate the aforementioned problems and to provide a solid state-imaging device with memory function, which has a small unit pixel area, a small electric current consumption and a simple structure and which can be produced without the need of any complicated producing processes, and a method for controlling the same.
In order to accomplish the aforementioned and other objects, according to one aspect of the present invention, a solid-state imaging device comprising:
a semiconductor substrate;
a nonvolatile memory transistor which is formed on the semiconductor substrate and which has a charge storage layer and a control gate, a photoelectric converting region being arranged below the charge storage layers and in the semiconductor substrate, the nonvolatile memory transistor being irradiated with light to generate charges in the photoelectric converting region and to inject the charges into the charge storage layer, the charges being stored in the charge storage layer as pixel information; and
at least two selecting gate transistors, each of which is formed on both sides of the nonvolatile memory transistor so as to share a diffusion layer with the nonvolatile memory transistor.
According to the present invention, unlike conventional structures wherein a nonvolatile memory transistor is provided separately from a light receiving part, a substrate region below a charge storage layer of a nonvolatile memory transistor is used as a photoelectric converting region, so that an image pickup pixel unit with memory function can be formed in a small area. During image pickup, selecting gate transistors arranged on both sides of the nonvolatile memory remain being turned off to form a potential barrier to the photoelectric converting region to allow an efficient photoelectric conversion.
In addition, the selecting gate transistors function as switching elements when pixel information held in the nonvolatile memory transistor in a threshold state is read out. Therefore, since no CCD is used for reading pixel information, the electric current consumption is smaller than those in the conventional imaging device using the CCD.
Moreover, the pixel unit according to the present invention has the same structure as that of an EEPROM memory so that it can be realized by a simple producing process in no need of any particularly complicated structures.
According to another aspect of the present invention, a method for controlling a solid-state imaging device comprising:
a semiconductor substrate;
a nonvolatile memory transistor which is formed on the semiconductor substrate and which has a charge storage layer and a control gate, a photoelectric converting region being arranged below the charge storage layers and in the semiconductor substrate, the nonvolatile memory transistor being irradiated with light to generate charges in the photoelectric converting region and to inject the charges into the charge storage layer, the charges being stored in the charge storage layer as pixel information; and
at least two selecting gate transistors, each of which is formed on both sides of the nonvolatile memory transistor so as to share a diffusion layer with the nonvolatile memory transistor,
wherein a plurality of pixel units are arranged on the semiconductor substrate in the form of a matrix so as to extend in row and column directions, each of the pixel units comprising the nonvolatile memory transistor and two the selecting gate transistors arranged on both sides thereof, the method comprising:
an erase step for electrically emitting charges from the charge storage layer of the nonvolatile memory transistors;
an image pickup step for turning off the selecting gate transistors and irradiating the nonvolatile memory transistors with light while a writing voltage is applied to the control gate of the nonvolatile memory transistors, to inject charges generated in the photoelectric converting region of a corresponding one of the nonvolatile memory transistors, into the charge storage layer of the corresponding one of the nonvolatile memory transistors; and
a reading step for reading the pixel information by applying a reading voltage to the control gate of a corresponding one of the nonvolatile memory transistors while the selecting gate transistors are turned on.
According to further aspect of the present invention, a method for controlling a solid-state imaging device comprising:
a semiconductor substrate;
a nonvolatile memory transistor which is formed on the semiconductor substrate and which has a charge storage layer and a control gate, a photoelectric converting region being arranged below the charge storage layers and in the semiconductor substrate, the nonvolatile memory transistor being irradiated with light to generate charges in the photoelectric converting region and to inject the charges into the charge storage layer, the charges being stored in the charge storage layer as pixel information: and
at least two selecting gate transistors, each of which is formed on both sides of the nonvolatile memory transistor so as to share a diffusion layer with the nonvolatile memory transistor,
wherein a plurality of pixel units ar
Banner & Witcoff , Ltd.
Garber Wendy R.
Ye Lin
LandOfFree
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