Solid state imaging device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device

Reexamination Certificate

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Details

C257S222000, C257S228000

Reexamination Certificate

active

06392261

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid state imaging device and a method of manufacturing thereof.
2. Description of the Related Art
Referring to
FIG. 3
, a conventional method of manufacturing a solid state imaging device is described. As shown in FIG.
3
(
a
), upon a p-type silicon substrate
301
, an n-type well layer
302
for the vertical charge coupled device (CCD) is formed, by the ion implantation technique using the n-type dopant. Next, a first gate oxide film
303
is formed, by the high temperature thermal oxidation method, at a temperature above 900° C. and thereafter a polysilicon film is deposited, by the chemical vapour deposit (CVD) method, to a thickness of 400 nm, following which a patterning of this polysilicon film is performed and thereby a first charge transfer electrode
304
is formed.
Next, as shown in FIG.
3
(
b
), a second gate oxide film
305
with a thickness of 60-100 nm is formed on the first gate oxide film
303
by the thermal oxidation, carried out at a high temperature above 900° C. During this, the surface of the first charge transfer electrode
304
is also subject to the thermal oxidation, which results in the formation of an oxide film
306
on the top of the first charge transfer electrode
304
. Consequently, in this manufacturing method, the edges of the first charge transfer electrode
304
are lifted up at the time of formation of the second gate oxide film
305
.
After this, as shown in FIG.
3
(
c
), patterns of a second charge transfer electrode
307
of polysilicon are formed. In the present conventional example, the edges of the first charge transfer electrode
304
become overhanged so that an etching tends to leave remains in this part, at the time of formation of the second charge transfer electrode, and, as a result, it is apt to short-circuit between patterns of the second charge transfer electrode
307
. Moreover, lifting the first charge transfer electrode
304
makes the gap of the levels on the surface more significant, which leads to a problem of poor coverage of a light-shielding film that is to be formed in a later step.
FIG. 4
is schematic sectional views illustrating, in sequence, another conventional method of manufacturing a solid state imaging device which solves the above problems, wherein a second gate insulating film is formed by the CVD method.
First, as shown in FIG.
4
(
a
), an n-type well layer
402
in a signal charge transfer section is formed on the surface of a p-type silicon substrate
401
by the ion implantation technique using the n-type dopant. Next, a first gate oxide film
403
is formed, by the high temperature thermal oxidation method at a temperature above 900° C., and thereafter a polysilicon film is deposited, by the CVD method, to a thickness of 400 nm, following which a patterning of this polysilicon film is performed and thereby a first charge transfer electrode
404
is formed.
Next, after the first gate oxide film is removed by wet etching, using hydrofluoric acid solution as an etchant and the first charge transfer electrode
404
as a mask, a second gate oxide film
405
and an oxide film
406
are formed by the CVD method, as shown in FIG.
4
(
b
).
Next, as shown in FIG.
4
(
c
), after a second polysilicon film is deposited to a thickness of approximately 100-250 nm by the CVD method, this second polysilicon film is patterned to a prescribed shape by selective etching and thereby a second charge transfer electrode
407
is formed.
However, in this conventional method of manufacturing the charge transfer device, when the second gate oxide film is formed by removing the exposed first gate insulating film, making use of the first charge transfer electrode as a mask, an outdiffusion of phosphorus may take place in the n-type well layer which is to become a channel region of the signal charge transfer section. Because of this, a region beneath the first charge transfer electrode and a region beneath the second charge transfer electrode may show different channel potential characteristics, which is a clear drawback.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a solid state imaging device, wherein:
when the identical voltage is applied to both of electrodes, the first charge transfer electrode and the second charge transfer electrode, the level of channel potentials under respective electrodes are the same;
a displacement of the potential under the second charge transfer electrode is sufficiently secured; and
thereby the amount of the maximum transfer charge in the vertical CCD is improved.
In accordance with an aspect of the present invention that solves the above problems, there is provided a method of manufacturing a solid state imaging device, which comprises steps of:
forming a semiconductor region of the second conductive-type as a charge transfer section upon a semiconductor substrate of the first conductive-type;
forming a first gate insulating film on the entire surface and thereafter forming a first polysilicon film, which is, then, patterned to form a first charge transfer electrode;
removing, wholly or partially, the exposed part of said first gate insulating film and thereafter forming a second gate insulating film on the entire surface; and
forming, upon said second gate insulating film, a second polysilicon film, which is then patterned to form a second charge transfer electrode; wherein:
the film thickness of said second gate insulating film is larger than that of said first gate insulating film;
the film thickness of said first gate insulating film and said second gate insulating film are set in such a way that the channel potential under said first charge transfer electrode and the channel potential under said second charge transfer electrode are approximately identical, when the identical voltage is applied to both of said first charge transfer electrode and said second charge transfer electrode.
The above and further objects and novel features of the invention will more fully appear from the following detailed description when the same is read in connection with the accompanying drawings. It is to be expressly understood, however, that the drawings are for purpose of illustration only and are not intended as a definition of the limits of the invention.


REFERENCES:
patent: 3863065 (1975-01-01), Kosonocky
patent: 5040038 (1991-08-01), Yutani
patent: 7-106543 (1995-04-01), None

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