Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1999-03-19
2003-08-05
Garber, Wendy R. (Department: 2712)
Television
Camera, system and detail
Solid-state image sensor
C257S230000
Reexamination Certificate
active
06603511
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related to solid-state imaging devices and cameras incorporating such devices. In particular, the invention pertains to such devices and cameras that can monitor the quantity of incident light.
BACKGROUND OF THE INVENTION
FIG.
13
(
a
) is a top view showing a typical composition of a picture element unit (pixel) in a conventional solid-state imaging device.
FIG.
13
(
b
) is a cross section along the line
13
b
—
13
b
shown in FIG.
13
(
a
), and FIG.
13
(
c
) is a cross section along the line
13
c
—
13
c
shown in FIG.
13
(
a
).
This solid-state imaging device is a frame-transfer type CCD picture element sensor (hereinafter referred to as simply “CCD”) having a lateral overflow drain construction (hereinafter referred to as “LOD”).
As shown in FIG.
13
(
b
), N-type semiconductor regions
2
,
3
are formed on the surface of a P-type semiconductor substrate
1
. As shown in FIG.
13
(
a
), the N-type semiconductor regions
2
and
3
are alternately formed facing toward the longitudinal direction of the figure. The impurity concentration in the N-type semiconductor region
3
is higher than in the N-type semiconductor region
2
. Further, as shown in FIG.
13
(
c
), an N-type semiconductor region (LOD diffusion region)
4
and P-type semiconductor regions
5
,
6
are formed on the surface of the P-type semiconductor substrate
1
, and the N-type semiconductor region
4
is positioned between the P-type semiconductor regions
5
and
6
.
An oxidation layer
7
is formed on the N-type semiconductor regions
2
,
3
,
4
and the P-type semiconductor regions
5
,
6
, and vertical-transfer gate electrodes
8
a
,
8
b
are formed on this oxidation layer
7
. The vertical-transfer gate electrodes
8
a
,
8
b
comprise, for example, transparent polysilicon. As shown in FIG.
13
(
a
), the gate electrodes
8
a
and
8
b
extend in the horizontal direction and are alternately wired facing toward the longitudinal direction.
A vertical-transfer portion
9
comprises the N-type semiconductor regions
2
and
3
. This vertical-transfer portion
9
also functions as a light-receiving portion and is a region where the optical-signal charges Qs (electrons in this case) generated by light incident on the CCD are stored and transferred. Moreover, the P-type semiconductor region
5
functions as an anti-blooming barrier. Any excessive electrical charge Qex that cannot be stored in the-vertical-transfer portion
9
invades the region
5
and is discharged to the LOD diffusion region
4
(N-type semiconductor region). In addition, the P-type semiconductor region
6
functions as a pixel-separation region. The normal size of a pixel is approximately 5-20 &mgr;m. Because a shading membrane that blocks light impinging on a pixel portion is not formed in this type of solid-state imaging device, light impinges on the entire pixel portion.
FIG. 14
is a compositional drawing showing a CCD wherein pixel units of the solid-state imaging device shown in FIG.
13
(
a
) are arranged in a two-dimensional matrix. This CCD comprises a light-receiving portion
10
and a horizontal-transfer portion
11
comprising the vertical transfer portion
9
of FIG.
13
(
a
).
FIG. 15
is a top view showing a typical end portion (and its periphery), of the vertical-transfer portion
9
shown in FIG.
13
(
a
). Aluminum wiring
13
is connected through a contact region
9
b
to an N-type region
9
a
of the end portion of the vertical-transfer portion
9
positioned on a side opposite the horizontal-transfer portion
11
. An electrical potential Vr is applied to the aluminum wiring
13
. The potential Vr causes the bias of the vertical-transfer portion
9
to be opposite the bias of the P-type semiconductor substrate
1
. Further, a gate electrode
8
c
is formed between the aluminum wiring
13
and the gate electrode
8
b
, and a constant electrical potential Vc is applied to the gate electrode
8
c
. Overflow wiring
14
is connected through a contact region
4
a
to the end portion of the LOD diffusion region
4
, and a constant electrical potential Vf is applied from a terminal
18
through the overflow wiring
14
to the LOD diffusion region
4
. The potential Vf has a bias opposite to the bias of the P-type semiconductor substrate
1
.
In the CCD of
FIG. 14
, an optical-signal charge Qs is generated and stored in each pixel by means of light incident on the vertical-transfer portion
9
. Next, the optical-signal charge Qs is transferred to the horizontal-transfer portion
11
and further transferred from the horizontal-transfer portion
11
to an output amplifier
12
. The optical-signal charge Qs is then output to the exterior of the element as a signal Vout through the output amplifier
12
. From among the optical-signal charges Qs, excessive electrical charge Qex that cannot be stored in the vertical-transfer portion
9
overflows into the LOD diffusion region
4
. The excessive electrical charge Qex overflowing into the LOD diffusion region
4
is discharged through the overflow wiring
14
on which is applied a constant electrical potential Vf.
Next, a combined operation by the above-mentioned CCD and shutter to capture a still picture will be described using the drive-timing chart shown in FIG.
16
.
First, a pre-exposure initialization is carried out in a state in which the shutter is closed during the period Tp
1
. Namely, in order to reset the electrical charge stored in the horizontal-transfer portion
11
, a clock pulse (not shown in figure) is applied to the horizontal-transfer portion
11
, and the electrical charges of the horizontal-transfer portion
11
successively transfer to the output amplifier
12
. Thereafter, clock pulses &phgr;V
1
, &phgr;V
2
are applied to the vertical-transfer gate electrodes
8
a
,
8
b
, and the electrical charges stored in the vertical-transfer portion
9
successively transfer to the horizontal-transfer portion
11
. After an electrical charge transferred to the horizontal-transfer portion
11
in this manner is transferred within the horizontal-transfer portion
11
, the electrical charge is output through the output amplifier
12
and is then reset. The vertical-transfer portion
9
and the horizontal-transfer portion
11
are reset by means of this sequence of transfer operations.
Thereafter, in the period Tp
2
, after the clock pulses &phgr;V
1
, &phgr;V
2
applied to the vertical-transfer gate electrodes
8
a
,
8
b
are maintained at an “L” (low) level, the shutter opens and the CCD enters an exposure state. Because the impurity concentration in the N-type semiconductor region
3
is higher than the impurity concentration in the N-type semiconductor region
2
, the optical-signal charge Qs is stored in the N-type semiconductor region
3
during the period Tp
2
.
Next, in the period Tp
3
, the shutter is closed, a clock pulse is applied to the vertical-transfer portion
9
and the horizontal-transfer portion
11
; the optical-signal charge Qs is transferred, and a picture signal is output from the output amplifier
12
to the exterior of the element.
In other words, when &phgr;V
1
becomes a “H” (high) level, the optical-signal charge Qs stored in the N-type semiconductor region
3
under the vertical-transfer gate electrodes
8
a
,
8
b
in the exposure state of the period Tp
2
is collected in the N-type semiconductor region
3
under the vertical-transfer gate electrode
8
a
to which the clock pulse &phgr;V
1
is applied. Thereafter, when &phgr;V
2
becomes a “H” (high) level, the optical signal charge Qs of the N-type semiconductor region
3
is transferred to the N-type semiconductor region
3
under the vertical-transfer gate electrode
8
b
on which the clock pulse &phgr;V
2
of an adjacent pixel is applied. The electrical signal charge in FIG.
13
(
a
) is transferred in the upward direction. That is, when the clock pulse &phgr;V
2
rises to a “H” (high) level, the optical-signal charge Qs is transferred from the vertical-transfer portion
9
to the horizontal-transfer portion
11
. Before the clock pu
Garber Wendy R.
Klarquist & Sparkman, LLP
Tillery Rashawn N.
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