Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2000-06-21
2004-08-24
Ho, Tuan (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S301000
Reexamination Certificate
active
06781627
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon claims the benefit of priority from the prior Japanese Patent Applications No. 11-178388 filed Jun. 24, 1999; and No. 11-354415 filed Dec. 14, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a charge detecting device, and more particularly to a solid state imaging element and a solid state imaging device using a CMOS image sensor of a low noise amplification type which can implement a high picture quality, and a charge detecting device requiring signal charge detection having high precision which is to be used in a comparator or the like for an analog digital converter (ADC).
As the solid state imaging element, conventionally, a function of amplifying a charge signal photoelectrically converted in a pixel has been provided. Consequently, the invention for enhancing the characteristic of the image sensor has been made and put into practical use.
As a pixel having the function of amplifying the photoelectrically converted signal, thus, there has been proposed a method of providing, on a pixel, a signal amplifying circuit constituted by an MOS type field effect transistor as is disclosed in IEEE Journal of Solid-State Circuits, vol. SC-4, No. 6 (1969) “Photosensitivity and Scanning of Silicon Image Detector Arrays” and Jpn. Pat. Appln. KOKAI Publication No. 50-134393.
An MOS image sensor in which a pixel is constituted by an MOS type field effect transistor can be manufactured in a process almost similar to that of a general-purpose CMOS. Therefore, the manufacture can easily be carried out and a simple power source can be used because an ordinary CMOS clock is enough for a driving pulse and an operation can be performed with a single power source. In addition, it is easy to integrate a CMOS digital circuit and an analog circuit in the same chip.
Such an MOS image sensor has some excellent features as compared with a CCD image sensor, for example, an image sensor having a multifunction can be constituted. In recent years, consequently, attention has been mainly paid to the MOS image sensor as an image sensor to be incorporated in a portable imaging device which requires low power consumption and a reduction in a size.
FIG. 5
shows a conventional amplification type pixel constituted by the MOS type field effect transistor.
First of all, an amplification type pixel constituted by the conventional MOS type field effect transistor will be described with reference to FIG.
5
.
FIG. 5
illustrates the structure of a unit pixel by using an equivalent circuit.
In
FIG. 5
, the reference numeral
10
-
1
denotes a photodiode for generating an electric charge through irradiated light.
Moreover, the reference numeral
10
-
2
denotes an MOS type field effect transistor for reset which serves to connect an N side electrode
10
-
3
of the photodiode
10
-
2
to a voltage wiring
10
-
4
of a reset voltage (source) VRS.
Furthermore, the reference numeral
10
-
5
denotes an MOS type field effect transistor for amplification which has a gate electrode connected to the N side electrode
10
-
3
of the photodiode
10
-
1
and a drain electrode side connected to a voltage wiring
10
-
6
of a voltage power source VD.
The reference numeral
10
-
7
denotes an MOS type field effect transistor for pixel selection which has a drain electrode connected to a source electrode of the MOS type field effect transistor
10
-
5
for amplification and has a source electrode connected to a signal output wiring
10
-
8
.
The signal output wiring
10
-
8
is grounded at an output terminal through a load circuit
10
-
9
and serves to output a signal voltage depending on a voltage (VPIX) of the N side electrode
10
-
3
of the photodiode
10
-
1
through a source follower circuit which is equivalently constituted by the MOS type field effect transistor
10
-
5
for amplification and the load circuit
10
-
9
.
Next, the operation of the pixel shown in
FIG. 5
will be described.
FIGS. 6A
,
6
B and
6
C are timing charts illustrating the operation of a conventional pixel.
In
FIGS. 6A
,
6
B and
6
C, &PHgr;RS denotes a pulse to be input to the gate electrode of the MOS type field effect transistor
10
-
2
for reset.
Moreover, &PHgr;RD denotes a pulse to be input to the gate electrode of the MOS type field effect transistor
10
-
7
for pixel selection.
Furthermore, VPIX denotes a change in the electric potential of the N side electrode
10
-
3
of the photodiode
10
-
1
.
First of all, &PHgr;RS is set to H at a time t
0
, and the electric potential VPIX of the N side electrode
10
-
3
of the photodiode
10
-
2
is set to have a reset voltage VRS.
Next, the MOS transistor
10
-
2
for reset is turned off at t
1
, and the N side electrode
10
-
3
of the photodiode is brought into a floating state.
When light is incident on the pixel, an optical generating current flows to the photodiode
10
-
1
and electric charges of an electron optically generated are accumulated-in the N side electrode
10
-
3
of the photodiode
10
-
1
. Consequently, the electric potential VPIX is gradually dropped.
Next, when the MOS type field effect transistor
10
-
7
for pixel selection is turned on at a time t
2
, a voltage output corresponding to the electric potential VPIX of the N side electrode
10
-
3
of the photodiode
10
-
1
at the time t
2
is output to the signal output wiring
10
-
8
.
The VPIX depends on the amount of electric charges accumulated in the N side electrode
10
-
3
of the photodiode
10
-
1
. Therefore, the output of the signal output wiring
10
-
8
is monitored so that the amount of the accumulated electric charges is estimated. After all, the amount of the incident light can be detected.
In the case in which each pixel has a signal amplifying function, it is necessary to consider that the picture quality of an output image should be prevented from being remarkably deteriorated due to noises generated on an output due to an offset variation.
Such a noise is fixed to a pixel position and is referred to as a fixed pattern noise (hereinafter referred to as “FPN”).
For example, Jpn. Pat. Appln. KOKAI Publication No. 56-46374 has disclosed a general method of suppressing the generation of the FPN.
Moreover, Jpn. Pat. Appln. KOKAI Publication No. 08-004127 has disclosed an example of suppressing the generation of the FPN which is applied to an amplification type imaging element.
An FPN canceling method will be described below.
FIG. 7
simply shows the structure of an image device comprising a reading circuit for canceling the FPN.
In
FIG. 7
, the reference numeral
12
-
1
denotes a pixel array section constituted by a plurality of pixels
12
-
2
arranged two-dimensionally, for example, in a matrix.
Moreover, the reference numeral
12
-
3
denotes a vertical scanning circuit for selecting the row of the pixel array section
12
-
2
.
Furthermore, the reference numeral
12
-
4
denotes a horizontal scanning circuit for selecting the output column of the pixel array section
12
-
2
.
A selecting pulse input terminals and a reset pulse input terminals of the pixels in a row are connected to a row selecting line
12
-
5
and a row reset line
12
-
6
respectively, and are controlled with a scanning signal output from the vertical scanning circuit
12
-
3
.
Moreover, the signal output terminals of the pixels in a column are connected to a signal output line
12
-
7
, and a signal output to the signal output line
12
-
7
is input to an FPN canceling section
12
-
18
provided in column parallel.
The FPN canceling circuit
12
-
18
is constituted by two sample hold circuits including a switch
12
-
9
, a capacitor
12
-
11
, and a switch
12
-
10
and a capacitor
12
-
12
.
The capacitor
12
-
11
is connected to a first video signal line
12
-
15
through a horizontal selecting switch
12
-
13
, and the capacitor
12
-
12
is connected to a second video signal line
12
-
16
through a horizontal selecting switch
12
-
14
.
These first video output line
12
-
Frishauf Holtz Goodman & Chick P.C.
Ho Tuan
Olympus Optical Co,. Ltd.
LandOfFree
Solid state imaging device and electric charge detecting... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Solid state imaging device and electric charge detecting..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solid state imaging device and electric charge detecting... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3347304