Solid-state image sensor output MOSFET circuit

Details Solid-state image sensor output MOSFET circuit Solid-state image sensor output MOSFET circuit

1999-08-25

2001-01-23

Munson, Gene M. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Charge transfer device

C257S386000, C377S060000

Reexamination Certificate

active

06177692

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a solid-state image sensor, and more particularly to a solid-state image sensor having small-sized pixels which deal with a small quantity of electric charges.
2. Description of the Related Art
An apparatus for transferring electric charges is generally designed to have an output circuit comprised of a multi-staged MOSFET. The apparatus accumulates electric charges having been transferred through an electric charge transfer section, in a detection capacity, and amplifies and outputs fluctuation in potential in the detection capacity. As such an apparatus for transferring electric charges, there have been known an apparatus including MOSFET having a floating diffusion layer for detecting signal electric charges, and MOSFET having a gate electrode electrically connected to the floating diffusion layer through a wiring layer, and constituting a source follower circuit.
For instance, one of such apparatuses is suggested in “Two Phase Charge Coupled Devices with Overlapping Polysilicon and Aluminum Gates”, Kosonocky W. F. and Cames J. E., RCA Review, Vol. 34, 1973, pp. 164-202.
FIG. 1
is a cross-sectional view of a conventional solid-state image sensor. The illustrated solid-state image sensor is comprised of a light-electricity converting section (not illustrated) in which light is converted into electricity, a three-phase driven electric charge transfer section
10
for transferring electric charges therethrough, a signal electric charge detector
16
including MOSFET
14
for resetting, and a two-staged source follower circuit comprised of a first-stage source follower circuit
18
and a second-stage source follower circuit
20
.
With reference to
FIG. 1
, the three-phase driven electric charge transfer section
10
is comprised of a p-type semiconductor substrate
22
, an n-type semiconductor region
24
formed in the semiconductor substrate
22
, electric charge transfer electrodes
26
,
28
and
30
to which transfer pulses &phgr;
1
, &phgr;
2
, &phgr;
3
are applied, respectively, and a gate electrode
32
to which a low voltage Vog generated at an output end of the electric charge transfer section
10
is applied.
The signal electric charge detector
16
is comprised of the p-type semiconductor substrate
22
, a floating diffusion layer
12
formed in the semiconductor substrate
22
, the an n-type semiconductor region
24
formed in the semiconductor substrate
22
, an n+ semiconductor region
36
electrically connected to a reset voltage source Vrd, and a reset gate electrode
34
to which a reset pulse voltage &phgr; is applied.
The first-stage source follower circuit
18
is comprised of the p-type semiconductor substrate
22
, a gate electrode
37
of first MOSFET for detecting electric charges, a gate electrode
39
of a depletion type second MOSFET acting as a load, a wiring layer
41
through which drain potential is supplied, a wiring layer
43
from which source potential of the first MOSFET is supplied, a wiring layer
45
through which source potential or ground potential of the second MOSFET is supplied, heavily doped p-type semiconductor regions
48
for electrically isolating regions in each of which a device is to be fabricated, and an interlayer insulating film
49
electrically insulating the gate electrodes
37
and
39
from others.
The second-stage source follower circuit
20
is comprised of the p-type semiconductor substrate
22
, a gate electrode
38
of first MOSFET for detecting electric charges, a gate electrode
40
of a depletion type second MOSFET acting as a load, a wiring layer
42
through which drain potential is supplied, a wiring layer
44
from which source potential of the first MOSFET is supplied, a wiring layer
46
through which source potential or ground potential of the second MOSFET is supplied, heavily doped p-type semiconductor regions
50
for electrically isolating regions in each of which a device is to be fabricated, and an interlayer insulating film
51
electrically insulating the gate electrodes
38
and
40
from others.
The floating diffusion layer
12
of the signal electric charge detector
16
is electrically connected to the gate electrode
37
of the first-stage source follower circuit
18
through a wiring
53
.
A drain voltage source Vdd is electrically connected to the wiring layers
41
and
42
in the first- and second-stage source follower circuits
18
and
20
. The wiring layer
43
from which a source voltage in the first-stage source follower circuit
18
is supplied is electrically connected to the gate electrode
38
of the second-stage source follower circuit
20
. The wiring layer
44
from which a source voltage in the second-stage source follower circuit
20
is supplied is electrically connected to a signal output terminal
52
.
Assuming that an electric charge detecting capacity including the gate electrode
37
electrically connected to the floating diffusion layer
12
of the signal electric charge detector
16
is represented as Cfd, and a quantity of signal electric charges having been transferred is represented as Qsig, there is generated fluctuation &Dgr;Vfd in the floating diffusion layer
12
. Herein, the fluctuation &Dgr;Vfd is defined as Qsig/Cfd(&Dgr;Vfd=Qsig/Cfd).
The fluctuation &Dgr;Vfd varies a gate voltage in the gate electrodes of the first MOSFETs in the first- and second-stage source follower circuits
18
and
20
. As a result, variation in a voltage, which is in proportion to a quantity of signal electric charges Qsig, is detected in the output terminal
52
.
In recent solid-state image sensors, it is necessary to ensure a sufficient S/N ratio in image signals, that is, to reduce an electric charge detecting capacity in order to enhance detection sensitivity.
However, since the conventional solid-state image sensor is designed to have a non-planarized thin interlayer insulating film
49
for preventing occurrence of smear, as illustrated in
FIG. 2
, influence of a capacity between a gate and a wiring on the electric charge detecting capacity is not ignorable.
The above-mentioned capacity between a gate and a wiring corresponds to a capacity between the gate electrode
37
and the wiring layers
41
and
43
in the first-stage source follower circuit
18
, and also corresponds to a capacity between the gate electrode
38
and the wiring layers
42
and
44
in the second-stage source follower circuit
20
.
The capacities are influenced by a distance between a gate electrode and a wiring layer. In
FIG. 1
, a distance between the wiring layer
41
to which the drain voltage Vdd is applied and the gate electrode
37
in the first-stage source follower circuit
18
is represented as L
1
, and a distance between the wiring layer
42
to which the drain voltage Vdd is applied and the gate electrode
38
in the second-stage source follower circuit
20
is represented also as L
1
.
In
FIG. 1
, the wiring layer
41
is illustrated as spaced away from the gate electrode
37
for the purpose of explanation. However, the wiring layer
41
is formed actually in such a manner that the wiring layer
41
extends to a location above the gate electrode
37
with the interlayer insulating film
49
being sandwiched therebetween, as illustrated in FIG.
2
. As a result, the distance L
1
is nearly equal to zero.
The conventional solid-state image sensor having the above-mentioned structure is accompanied with a problem that it would be impossible to have high sensitivity due to-insufficient reduction in an electric charge detecting capacity, if the solid-state image sensor had small-sized pixels which deal with a small quantity of electric charges.
SUMMARY OF THE INVENTION
In view of the above-mentioned problem, it is an object of the present invention to provide a solid-state image sensor which is capable of sufficiently reducing an electric charge detecting capacity to thereby ensure high sensitivity, even if it has small-sized pixels which deal with a small quantity of electric charges.
There is pr

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