Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2001-03-16
2002-11-19
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C438S075000
Reexamination Certificate
active
06482667
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid state image sensor device, and more particularly, to a solid state image sensor device and a method of fabricating the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for improving a horizontal charge transfer efficiency in the solid state image sensor device.
2. Discussion of the Related Art
In general, a solid state image sensor is a device which uses a combination of a photoelectric conversion device with a charge coupled device in taking an image of an objective and outputting the image as an electrical signal. The solid state image sensor device is used in transmitting signal charges generated in a photoelectric conversion device (i.e., a photodiode) through a microlens and a color filter in a particular direction in a substrate utilizing a potential variation. The solid state image sensor is provided with a plurality of photoelectric conversion regions, vertical charge coupled devices (VCCDs) having each one formed between the photoelectric conversion regions for vertical transmission of charges generated in the photoelectric conversion regions, a horizontal charge coupled device (HCCD) for horizontal transmission of the charge transmitted in the vertical direction by the VCCDs, and a floating diffusion region for sensing and amplifying the charges transmitted in the horizontal direction and supplying to a peripheral circuit.
A related art method of fabricating a solid state image sensor device will be explained with reference to the attached drawings.
FIGS. 1A
to
1
D illustrate cross-sectional views showing the steps of a related art method for fabricating an HCCD.
Initially referring to
FIG. 1A
, the related art method of fabricating an HCCD begins by forming a P-well region
12
in a surface of an N type semiconductor substrate
11
and forming a buried charge coupled device (BCCD)
13
in the P-well region
12
by buried ion implantation for use as a charge transmission channel through which signal charges are transmitted in a horizontal direction.
As shown in
FIG. 1B
, a gate insulating layer
14
is formed on the semiconductor substrate
11
having the BCCD
13
region formed therein. Thereafter, a first polysilicon layer (not shown) is formed on the gate insulating layer
14
. The first polysilicon layer is then patterned to form first polygates
15
.
In
FIG. 1C
, for lowering a pinch-off level of second polygates to be formed,in the later steps, P type ions are injected into surfaces of the semiconductor substrate
11
at both sides of the first polygates
15
to form barrier regions
16
.
Subsequently, an interlayer insulating layer
17
is formed on the entire surface including the first polygates
15
, as shown in
FIG. 1D. A
second polysilicon layer (not shown) is then deposited on the interlayer insulating layer
17
and subjected to selective etching, thereby forming second polygates
18
to overlap the barrier regions
16
and a portion of the first polygates
15
.
FIG. 2
illustrates a potential profile of the related art HCCD, referring to which an operation principle of the related art HCCD will be explained.
As shown in
FIG. 2
, a first clock signal H
1
(L) is applied to any one of the first and second polygates
15
and
18
while a second clock signal H
2
(H) is applied to the adjacent first or second polygate
15
or
18
, to transfer the photoelectric converted signal charge to an output terminal using a two-phase clocking. That is, even if signals of the same phase are applied to the first and second polygates
15
and
18
, the barrier regions
16
cause the first and second polygates
15
and
18
to have a different level of potentials to transfer charges in a step form.
However, the related art method of fabricating an HCCD has the following problem.
In a low speed operation, there is no problem in terms of a charge transfer efficiency because there is much time for the signal charges to be transferred from a low potential to a high potential. However, in a high speed operation, the signal charges cannot be transferred to the adjacent gates properly in the present step form. This is due to a very short transfer time for the signal charges, so that a charge transfer efficiency is lowered, thereby deteriorating a performance of the HCCD.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a solid state image sensor device and a method of fabricating the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a solid state image sensor device and a method of fabricating the same, which can improve a charge transfer efficiency in both low and high speed operations, thereby improving a performance of an HCCD.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a solid state image sensor device includes a semiconductor substrate, a well region in the semiconductor substrate, a horizontal charge transmission region in the well region, a plurality of insulating layers in the horizontal charge transmission region, a gate insulating layer on the entire surface including the insulating layers, a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, an interlayer insulating layer on the entire surface including the first polygates, and a plurality of second polygates on the interlayer insulating layer and overlapped with a portion of each first polygate.
In another aspect of the present invention, a method of fabricating a solid state image sensor device on a semiconductor substrate, the method comprising the steps of forming a well region in the semiconductor substrate, forming a horizontal charge transmission region in the well region, forming a plurality of insulating layers in the horizontal charge transmission region, forming a gate insulating layer on the entire surface of the substrate including the insulating layers, forming a plurality of first polygates on the gate insulating layer, the first polygates being separated from each other and overlapping a portion of each insulating layer, forming a plurality of impurity regions in the horizontal charge transmission region at both sides of each first polygate, forming an interlayer insulating layer on the entire surface including the first polygates, and forming second polygates on the interlayer insulating layer to overlap a portion of each first polygate.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory. and are intended to provide further explanation of the invention as claimed.
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Estrada Michelle
Fourson George
LG Semicon Co., LTD
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