Solid-state image sensor and method of driving same

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

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Details

C348S317000, C348S312000, C250S208100, C257S233000, C257S231000

Reexamination Certificate

active

06833872

ABSTRACT:

RELATED APPLICATION DATA
The present application claims priority to Japanese Application No. P10-370842 filed Dec. 25, 1998, which application is incorporated herein by reference to the extent permitted by law.
BACKGROUND OF THE INVENTION
The present invention relates to a progressive all-pixel scanning type solid-state image sensor and a method of driving such an image sensor.
FIG. 8
shows a known progressive all-pixel scanning type CCD solid-state image sensor based on three-phase driving, particularly the configuration of principal components in its image sensing area.
This CCD solid-state image sensor
1
has a vertical overflow structure, wherein a plurality of light receiving elements
2
each serving as a pixel are arrayed to form a matrix, and a CCD vertical transfer register
3
is formed on one side of each column of the light receiving elements. A read gate
4
for reading a signal charge from the relevant light receiving element
2
to the vertical transfer register
3
is formed between the light receiving element
2
and the vertical transfer register
3
, thereby constituting an image sensing area
5
. Further, an unshown CCD horizontal transfer register is provided for transferring the signal charge from the vertical transfer register
3
to an output unit. Reference numeral
6
denotes a transfer channel region of the vertical transfer register
3
.
The vertical transfer register
3
is so composed that three transfer electrodes
7
(V
1
, V
2
, V
3
) of a three-phase structure correspond to each light receiving element
2
. More specifically, for example, a first transfer electrode V
1
, composed of a first polysilicon layer, a second transfer electrode V
2
of a second polysilicon layer and a third transfer electrode V
3
of a third polysilicon layer are arrayed in succession repeatedly in the charge transfer direction on the transfer channel region
6
via a gate insulation film.
In the read gate
4
, for example, the extension of the second transfer electrode V
2
out of the transfer electrodes
7
(V
1
, V
2
, V
3
) is used as a read gate electrode
82
, or the extensions of the second and third transfer electrodes V
2
and V
3
are used as read gate electrodes
82
and
83
respectively.
In this CCD solid state image sensor
1
, three-phase vertical driving pulses &phgr;V
1
, &phgr;V
2
, &phgr;V
3
are applied to the first transfer electrode V
1
, second transfer electrode V
2
and third transfer electrode V
3
respectively, and a read pulse &phgr;
SG
(not shown) is superposed on a required one of such vertical driving pulses &phgr;V
1
-&phgr;V
3
. And in progressive scanning to read all pixels sequentially, the signal charges of the entire light receiving elements
2
are read out therefrom simultaneously. For example, there is adopted a mode of applying a read pulse &phgr;
SG
only to the second transfer electrode V
2
and reading out the signal charge from the read gate
4
, or a mode of applying a read pulse to the second and third transfer electrodes V
2
and V
3
, and reading out the signal charge from the read gate
4
thus widened in frontage. Thereafter the signal charges are transferred vertically by vertical driving pulses &phgr;V
1
-&phgr;V
3
.
In the known progressive all-pixel scanning type CCD solid-state image sensor
1
where the signal charges of the entire light receiving elements
2
are read simultaneously to the vertical transfer registers
3
, there exists a problem that, when a read pulse &phgr;
SG
, is applied, the potential in the overflow barrier of the light receiving element
2
tends to become deep, and it is difficult to lower the voltage of the read pulse &phgr;
SG
(hereinafter referred to as read voltage) required for transferring the signal charge from the light receiving element
2
to the vertical transfer register
3
.
Further, due to such a phenomenon that the overflow barrier is deepened by application of the read pulse &phgr;
SG
, it has been impossible heretofore to achieve a remarkable improvement in lowering the read voltage by merely increasing the region for application of the read pulse &phgr;
SG
, i.e., the frontage from the light receiving element
2
to the vertical transfer register
3
, namely the frontage (width) of the read gate
4
.
In the configuration of
FIG. 8
for example, when a read pulse &phgr;
SG
is applied to the second and third transfer electrodes V
2
and V
3
to read out the signal charge from the widened frontage of the read gate
4
composed of the read gate electrodes
82
and
83
, then a higher voltage is applied to ⅔ of the entire pixel area, so that the overflow barrier of the light receiving elements
2
is also deepened to eventually bring about another problem that the read voltage is rendered higher.
In order to suppress this undesired phenomenon, if reading is executed only from the read electrode
82
alone by applying the read pulse &phgr;
SG
merely to the second transfer electrode V
2
, then the frontage of the read gate
4
is narrowed on the contrary to impede the signal charge flow, hence raising the read voltage as a result.
In addition, lowering the read voltage is rendered further difficult due to the recent rapid progress in diminishing the chip size and increasing the number of component pixels. Such a rise of the read voltage naturally causes a greater power consumption inclusive of a peripheral system.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a progressive all-pixel scanning type solid-state image sensor which is adapted for curtailing the power consumption by lowering a read voltage with another advantage of reducing the pixel size.
And another object of the present invention resides in providing an improved method of driving such a solid-state image sensor.
According to one aspect of the present invention, there is provided a progressive scanning type solid-state image sensor for reading all pixels sequentially. The image sensor comprises pixels arrayed to form a matrix; vertical transfer registers corresponding respectively to individual columns of the pixels; read gates formed correspondingly to the individual pixels for reading out signal charges from the pixels to the vertical transfer registers; and a means for applying phase-shifted read pulses respectively to plural kinds of read gate electrodes in the read gates.
And according to another aspect of the present invention, there is provided a method of driving a progressive scanning type solid-state image sensor to read all pixels sequentially by applying phase-shifted read pulses respectively to plural kinds of read gate electrodes in read gates which are formed correspondingly to the individual pixels and are disposed between the arrayed pixels and charge transfer registers provided correspondingly to the individual columns of the pixels.
Thus, in progressive scanning to read the entire pixels sequentially, read pulses of shifted phases are applied to plural kinds of read gate electrodes in the read gates corresponding respectively to the individual pixels, and/or the read pulses of shifted phases are applied respectively to the read gates for a plurality of pixel groups.
In this manner, due to application of the phase-shifted read pulses to the plural kinds of read gate electrodes in the individual read gates and/or to the read gates respectively for a plurality of pixel groups, the pixel region where the read pulses are applied simultaneously in the entire pixel area is diminished to be smaller than the region in the related art, hence suppressing the modulation to the overflow barrier. Further, since the frontage of the read gate can be widened, it becomes possible to lower the read pulse voltage.
The above and other features and advantages of the present invention will become apparent from the following description which will be given with reference to the illustrative accompanying drawings.


REFERENCES:
patent: 4887160 (1989-12-01), Kinoshita et al.
patent: 5051832 (1991-09-01), Losee et al.
patent: 5229857 (1993-07-01), Taniji
patent: 5235

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