Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1997-10-17
2002-12-17
Moe, Aung S. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
Reexamination Certificate
active
06496223
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid-state image sensor and, more particularly, to a solid-state image sensor in which an interface area between a vertical charge coupled device (VCCD) and a horizontal charge coupled device (HCCD) is formed under the HCCD, thereby maximizing charge-transferring efficiency.
2. Discussion of the Related Art
FIG. 1
is a layout of a general solid-state image sensor, which includes photodiode regions for converting light signals into electric signals, a VCCD formed at right angle to the photodiode regions for transferring the converted signal charges, an HCCD formed at right angle to the VCCD for transferring the signal charges transferred from the VCCD, and a sensing amplifier SA for sensing and amplifying the signal charges transferred from the HCCD.
A VCCD-HCCD (V-H) interface area is placed between a VCCD and an HCCD.
FIG. 2
is a layout of conventional V-H interface areas and
FIG. 3
shows potential levels of V-H interface areas.
As shown in
FIG. 2
, signal charges, generated by photoelectric conversion in a photodiode region (PD), are transferred toward an HCCD by means of a VCCD. The transferred signal charges are then transferred to a sensing amplifier SA by clock signals H&phgr;
1
, H&phgr;
2
applied to polygates of the HCCD. At this time, the HCCD and the VCCD have different clock levels, as shown in FIG.
3
.
The VCCD generally carries out negative clocking. Since the VCCD is heightened to be in an accumulation mode during blanking of the HCCD, noise is made. Thus, potential barrier of a channel stop layer is not lowered.
As described above, signal charges are transferred from a VCCD to an HCCD because of difference of their clock levels.
In such a conventional solid-state image sensor, it was fine that VCCDs and HCCD are formed using one mask. However, since it is tendency to reduce a size of a device, any improvement of performance of a solid-state image sensor can hardly be expected.
FIG. 4
is a solid-state image sensor in which a VCCD and an HCCD are formed using one mask. Only one mask on a substrate
11
is used to form a p-well
13
over which a VCCD and an HCCD will be formed. A buried charge coupled device (BCCD)
15
and a channel stop (CST) layer
17
are formed in the p-well
13
. In case a VCCD and an HCCD are formed at a time using one mask, a size of the semiconductor device can be a problem. That is, when the size of the semiconductor device is diminished, and its packing density is heightened, a size of a pixel defining photodiodes and VCCDs is diminished as well. Accordingly, a VCCD becomes much smaller than an HCCD. For this problem, each of a VCCD and an HCCD is formed using its own mask to improve the performance of a semiconductor device.
FIG. 5
is a cross-sectional view taken along line I-I′ of FIG.
2
. As shown in
FIG. 5
, each of p-wells for a VCCD and an HCCD is formed using a mask. To obtain such a solid-state image sensor, a first p-well
13
for a VCCD is formed in a semiconductor substrate
11
using a mask. Subsequently, a second p-well
13
a
for an HCCD is formed using another mask. Next, ion-implanting process is performed over the first and second p-wells
13
and
13
a,
thus forming a BCCD
15
and a channel stop layer
17
therein.
However, since p-wells for VCCD and HCCD are formed using different masks, Hence, impurity ions having different concentrations for a VCCD and an HCCD are implanted in a diminished the size of a semiconductor device, thereby enhancing its packing density.
However, a conventional solid-state image sensor has the following problems. Since each of a VCCD and an HCCD is formed using a mask, V-H interface area is a problem. In other words, a p-well for a VCCD partially overlaps another p-well for an HCCD and thus a relatively big potential pocket is formed in the overlapped area than the other areas. Hence, on transferring signal charges, discontinuity is generated as though a well is formed in a transfer channel. Such discontinuity generates fixed pattern noise such as vertical black lines, thereby causing degradation of picture quality.
SUMMERY OF THE INVENTION
Therefore, the present invention is directed to a solid-state image sensor that substantially obviates one or more of problems due to limitations and disadvantages of the related art.
An object of the invention is to provide a solid-state image sensor in which a V-H interface area is formed in a VCCD to remove fixed pattern noise such as vertical black lines, thus enhancing its performance.
Additional features and advantages of the invention will be set forth in the description which follows and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a solid-state image sensor having a VCCD and an HCCD includes a substrate, a well formed in the substrate, a first impurity region formed in the well under the VCCD and HCCD, and a second impurity region selectively formed in the first impurity to have a border from the first impurity region under the HCCD and having a different ion concentration from the first impurity region.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5323034 (1994-06-01), Furumiya
patent: 08-186243 (1996-07-01), None
LG Semicon Co. Ltd.
Moe Aung S.
Morgan & Lewis & Bockius, LLP
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