Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
2000-06-06
2002-10-22
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S291000, C257S635000, C257S648000
Reexamination Certificate
active
06469329
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a solid state image sensing device and a method of producing such a device.
A solid state image sensing device generally includes a cell area and a peripheral circuit area. The cell area includes photoelectric conversion portions and charge transfer portions. The peripheral circuit area includes a first device isolation region having an insulating film with a relatively large thickness. The cell area includes a second device isolation region including an insulating film with a relative small thickness. The second device isolation region isolates the photoelectric conversion portions from each other, the photoelectric conversion portions from the charge transfer portions, and the charge transfer portions from each other.
In conventional techniques, the first and the second device isolation regions are generally formed by different processes, as disclosed for example in Japanese Unexamined Patent Publication No. 156861/1987 (Tokkai Sho 62-156861).
In the conventional solid state image sensing devices, a voltage as high as 15 V is applied to the peripheral circuit area. To achieve good electrical isolation for such a peripheral circuit area, it is required that the impurity concentration in the first device isolation region should be sufficiently high. The first device isolation region is formed under an insulating film with a relatively large thickness. Therefore, the ion implantation process for introducing impurities to form the first device isolation region is required to be performed before the LOCOS (Local Oxidation of Silicon) process for forming the insulating film with the relatively large thickness. The process for forming the insulating film with the relatively large thickness causes a junction of p+ type-impurity in the first device isolation region to become deeper. Thus, it is possible to obtain sufficient device isolation characteristic under the high applied voltage condition.
On the other hand, the voltage applied to the cell area is lower than that applied to the peripheral circuit area. Therefore, the impurity concentration of the second device isolation region in the cell area can be lower than that of the device isolation region of the peripheral circuit area. On the other hand, it is not required to form an insulating film with a relatively large thickness on the second device isolation region. Therefore, the process of forming the second device isolation region of the cell area is performed separately from the process of forming the first device isolation region in the peripheral circuit area. More specifically, the amount of impurity doped to form the device isolation region in the cell area is selected to be low enough to suppress the expansion of the second device isolation region thereby increasing the photoelectric conversion portions and the charge transfer portions thus enhancing the sensitivity and increasing the charge transfer capacity.
The LOCOS process for forming the insulating film with the relatively large thickness in the peripheral circuit area includes a thermal oxidation process. The thermal oxidation process needs a long processing time. In the conventional technique of producing solid state image sensing devices, such a long-time thermal-oxidation process causes a thermal stress that results crystal defects that act as cites where undesirable charges are generated. As a result, the solid state image sensing devices produced by the conventional technique have a large number of defects called white dots.
Another disadvantage of the conventional technique of producing solid state image sensing devices is that a large number of processing steps are required because the first device isolation region in the peripheral circuit area and the second device isolation region in the cell area are formed in different process steps.
SUMMARY OF THE INVENTION
In view of the above, it is an object of the present invention to provide a solid state image sensing device including a reduced number of white dot defects caused by a long-time heat treatment in a production process.
Another object of the present invention is to provide a method of producing such a solid state image sensing device, requiring a small number of processing steps.
These and other objects, features, and advantages of the present invention will become clear as the following description proceeds.
According to an aspect of the present invention, there is provided a solid state image sensing device comprising a cell area located at a semiconductor substrate and a peripheral circuit area formed around the cell area located at the semiconductor substrate. The cell area includes photoelectric conversion portions and charge transfer portions. The peripheral circuit area includes a first device isolation region and an insulating film with a relatively large thickness formed on the first device isolation region. The cell area includes a second device isolation region by which isolation is made between photoelectric conversion portions themselves, between photoelectric conversion portions and charge transfer portions, and between charge transfer portions themselves. The cell area further includes an insulating film with a relatively small thickness formed on the second device isolation region The solid state image sensing device is characterized in that the majority part of the insulating film with the relatively large thickness is formed by means of a CVD (chemical vapor deposition) process.
According to another aspect of the present invention, there is provided a method of producing a solid state image sensing device. The solid state image sensing device comprises a cell area located at a semiconductor substrate and a peripheral circuit area formed around the cell area located at the semiconductor substrate, the cell area including photoelectric conversion portions and charge transfer portions. The method comprises the steps of: forming the peripheral circuit area, the step of forming the peripheral circuit area including the steps of forming a first device isolation region and forming an insulating film with a relatively large thickness on the first device isolation region; forming the cell area, the step of forming the cell area including the steps of forming a second device isolation region by which isolation is made between photoelectric conversion portions themselves, between photo-electric conversion portions and charge transfer portions, and between charge transfer portions themselves and also forming an insulating film with a relatively small thickness on the second device isolation region, the method being characterized in that in the step of forming the insulating film with the relatively large thickness, the insulating film with the relatively large thickness is formed mainly by means of a CVD process.
REFERENCES:
patent: 5258333 (1993-11-01), Shappir et al.
patent: 5543342 (1996-08-01), Mukai et al.
patent: 5648292 (1997-07-01), Moon
patent: 62-156861 (1987-07-01), None
patent: 6-160897 (1994-06-01), None
patent: 7-45676 (1995-02-01), None
patent: 8-51196 (1996-02-01), None
Hatano Keisuke
Nakashiba Yasutaka
LandOfFree
Solid state image sensing device and method of producing the... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Solid state image sensing device and method of producing the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solid state image sensing device and method of producing the... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2995285