Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Charge transfer device
Reexamination Certificate
1998-10-16
2001-10-30
Ngô ;, Ngâ ;n V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Charge transfer device
C257S243000, C257S249000, C257S250000
Reexamination Certificate
active
06310370
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state image sensing device, and more particularly, to a CCD (charge coupled device) solid-state image sensing device employing a frame transfer system.
FIG. 1
is a schematic block diagram of a prior art CCD solid-state image sensing device
100
employing a frame transfer system. The CCD solid-state image sensing device
100
includes an image sensing part
102
, a storage part
104
, a horizontal transfer part
106
and an output part
108
. The image sensing part
102
comprises a plurality of shift-registers (not shown) that extend in the vertical direction and are disposed parallel with each other. The shift-registers each comprise a plurality of register bits that correspond to light-receiving pixels. The storage part
104
comprises a plurality of light-blocked shift-registers (not shown) disposed adjoining the shift-registers of the image sensing part
102
. Each of the storage part shift-registers comprises a plurality of register bits that form storage pixels. The horizontal transfer part
106
comprises a single shift-register (not shown) disposed extending in the horizontal direction. The transfer part shift-register comprises a plurality of shift-register bits connected with a plurality of shift-register outputs of the storage part
104
, respectively. The output part
108
comprises capacitors for temporarily storing charges transferred from the horizontal transfer part
106
and reset-transistors for discharging the capacitors.
The light-receiving pixel register bits of the image sensing part
102
are transferred to the storage pixels of the storage part
104
. The storage pixel bits of the storage part
104
are then transferred to the horizontal transfer part
106
in a unit of one line. The pixel data is then transferred from the horizontal transfer part
106
to the output part
108
in a unit of one pixel. A voltage that corresponds to each of the register bits is generated by the output part
108
and is output from the CCD solid-state image sensing device
100
.
FIG. 2
is a schematic plan view of the image sensing part
102
which is a three phase driving type.
FIG. 3A
is a cross-sectional view along line
3
A—
3
A of
FIG. 2
, and
FIG. 3B
is a cross-sectional view taken along line
3
B—
3
B of FIG.
2
.
A plurality of thick channel isolation regions
2
formed by selective oxidation are disposed parallel with each other on a surface of a P-type silicon substrate
1
. N-type diffusion layers
3
are disposed between each of the channel isolation regions
2
, such that the diffusion layers
3
are channel areas that are used as transfer paths by the pixel data bits. Thin gate insulation layers
4
, which preferably comprise silicon dioxide films, are disposed integrally with the channel isolation regions
2
on the diffusion layers
3
. A plurality of transfer electrodes
5
, which preferably comprise polycrystalline silicon, are disposed parallel with each other in a direction that is perpendicular to the channel isolation regions
2
. The transfer electrodes
5
are separated from each other by a constant distance on the gate insulation layers
4
and the channel isolation regions
2
.
Laminated on top of the transfer electrodes
5
is an interleave insulation layer
6
which comprises the same material as the gate insulation layers
4
. Power supply lines
8
, which preferably comprise aluminum, are disposed on top of the interleave insulation layer
6
and extend along the channel isolation regions
2
. The power supply lines
8
are connected to the transfer electrodes
5
through via holes
7
which are formed in the interleave insulation layer
6
at points of intersection between the channel isolation regions
2
and the transfer electrodes
5
. For example, for a three phase drive system, each of the via holes
7
is provided for every third transfer electrode
5
, whereby the power supply line
8
is connected with every third transfer electrode
5
. This allows three phase transfer clocks &phgr;
1
, &phgr;
2
, &phgr;
3
to be applied to the transfer electrodes
5
from the power supply lines
8
. Each transfer electrode
5
is fed from its associated power supply line
8
at a given spacing, and accordingly, if the transfer electrode
5
increases in length with an increase in the number of pixels, it is assured that all of entire transfer electrodes
5
accept transfer clocks &phgr;
1
to &phgr;
3
without substantial delay. As an example, Japanese Utility Model Publication No. Hei 7-51799 discloses a solid state image sensing device constructed in this manner.
In the solid state image sensing device
100
, the light receiving pixel includes the channel area formed between the diffusion layer
3
which comprises silicon and the insulation layer
4
which comprises silicon oxide. Where the aluminum power supply line
8
is disposed above the transfer electrode
5
, there is a likelihood that light incident to the channel area which defines the light receiving pixel may be subject to an irregular reflection by the surface of the power supply line
8
and the reflected light may impinge on light receiving pixels which are located near to the first mentioned pixel. Such light reflection may cause unnecessary charges to be developed in the light receiving pixels, causing disturbances or color shading in an image.
Where an unsaturated bond in the interface between the silicon of the channel area and the silicon oxide is compensated by hydrogen, the hydrogen is likely to be adsorbed by the aluminum of the power supply line
8
. This prevents the supply of a sufficient amount of hydrogen to the interface, rendering the compensation for the unsaturated bond unsatisfactory. During a thermal treatment which introduces the hydrogen into the channel area, the temperature must be low in order to avoid melting of the power supply line
8
. This necessitates a prolonged thermal treatment to ensure the supply of a sufficient amount of hydrogen to the interface.
It is an object of the invention to provide a solid state image sensing device which efficiently compensates the unsaturated bond at the silicon/silicon oxide interface of the channel area while reducing the diffuse reflection of light which is incident on respective light receiving pixels.
SUMMARY OF THE INVENTION
To achieve the above objective the present invention provides a solid state image sensing device comprising: a semiconductor substrate; a plurality of isolation regions extending in one direction on the semiconductor substrate, the isolation regions extending generally parallel to each other with a given spacing therebetween; a plurality of channel regions disposed on the semiconductor substrate between adjacent isolation regions; a plurality of transfer electrodes extending parallel to each other in a direction to intersect with the plurality of channel regions above the semiconductor substrate; and a plurality of power supply lines disposed above the plurality of transfer electrodes and extending in a direction to intersect with the transfer electrodes, wherein each of the power supply lines includes one of a refractory metal and a silicide formed by a refractory metal combined with silicon.
The present invention further provides a method of manufacturing a solid state image sensing device comprising the steps of: forming a plurality of isolation regions extending generally parallel to each other on a semiconductor substrate and forming a channel region between adjacent isolation regions; depositing a first insulation layer on the isolation regions and the semiconductor substrate on which said plurality of isolation regions and said plurality of channel regions are formed, and forming a plurality of transfer electrodes on the first insulation layer that extend in a direction to intersect with the plurality of isolation regions; depositing a second insulation layer on said plurality of transfer electrodes and forming via holes in the second insulation layer at points of intersection between the respective isolation re
Inoue Tetsuhiro
Miyagawa Kazuhiro
Fish & Richardson P.C.
Ngô ; Ngâ ;n V.
Sanyo Electric Co,. Ltd.
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