Solid state image pickup device

Details Solid state image pickup device Solid state image pickup device

1983-12-05

1986-04-22

Rubinson, Gene Z.

Facsimile and static presentation processing

Facsimile

Recording apparatus

357 24, H04N 314

Patent

active

045846081

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

This invention relates to a solid state image pickup device having an image pickup surface comprising a matrix of two-dimensionally arrayed image pickup picture units each comprising, in combination, a photoelectric transducer and a first switching element, in which signals based on signal charge produced by the respective rows of image pickup picture units are delivered successively to form an image pickup signal output through a plurality of second switching elements.


TECHNICAL BACKGROUND

There has been proposed a solid state image pickup apparatus comprising, as main components, a solid state image pickup device having an image pickup surface composed of a prescribed pattern, such as a matrix for example, of two-dimensionally arrayed image pickup picture units each comprising a photoelectric transducer and a switching element and additional switching elements disposed outside of the image pickup picture units for successively delivering, in a predetermined manner, signals based on signal charge produced by the image pickup surface, and a scanning circuit for selectively energizing the switching elements in the solid state image pickup device to deliver an image pickup signal output based on signal charge produced by the photoelectric transducers in the image pickup picture units. In the solid state image pickup device employed in such a solid state image pickup apparatus, each switching element is composed of an insulated-gate field-effect transistor (hereinafter referred to as a "MOS FET"), and the photoelectric transducers are composed of a plurality of photodetecting diodes provided respectively for the switching elements or a thin photoelectric conversion layer disposed over the two-dimensional array of the switching elements.
FIG. 1 shows an equivalent circuit of the solid state image pickup device that has heretofore been proposed, and a scanning circuit and an output circuit which are required for putting the solid state image pickup device into operation. The solid state image pickup device, generally designated at 1, is composed of enhancement-mode MOS FETs S.sub.11 to S.sub.mn serving as switching elements, respectively, and arrayed as a matrix in horizontal rows (in the direction of an arrow H) and in vertical rows (in the direction of an arrow V), and photoelectric transducers D.sub.11 to D.sub.mn each connected to one end, for example, a source of the corresponding one of the MOS FETs S.sub.11 to S.sub.mn. These MOS FETs S.sub.11 to S.sub.mn and photoelectric transducers D.sub.11 to D.sub.mn form an image pickup surface. Each combination of one of the MOS FETs S.sub.11 to S.sub.mn and one of the photoelectric transducers D.sub.11 to D.sub.mn forms one of image pickup picture units E.sub.11 to E.sub.mn.
The gates of the MOS FETs S.sub.11 to S.sub.mn which constitute the image pickup picture units E.sub.11 to E.sub.mn are connected in common in each horizontal row, and the groups of the gates connected in common are coupled respectively to m control terminals v.sub.1 to v.sub.m which are supplied with vertical scanning signals from a vertical scanning circuit 2. The drains of the MOS FETs S.sub.11 to S.sub.mn are connected in common in each vertical row, and groups of the drains connected in common are coupled to the sources, respectively, of enhancement-mode MOS FETs T.sub.1 to T.sub.n serving as switching elements. The enhancement-mode MOS FETs T.sub.1 to T.sub.n have their gates connected respectively to n control terminals h.sub.1 to h.sub.m which are supplied with horizontal scanning signals from a horizontal scanning circuit 3. The drains of the MOS FETs T.sub.1 to T.sub.n are connected in common through an output resistor 4 to a power supply 5 which supplies an operation voltage V.sub.V. An output terminal 6 is led from a junction between the drains of the MOS FETs T.sub.1 to T.sub.n connected in common and the output resistor 4.
The vertical scanning circuit 2 includes a shift register, for example, for issuing vertical scanning signals through the m control termin

REFERENCES:
patent: 4209806 (1980-06-01), Koike et al.

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