Solid-state image pick-up device and drive method for same

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C348S281000, C250S208100

Reexamination Certificate

active

06697113

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image pick-up device, to a circuit that reads out the amount of light that strikes photoelectrical conversion elements that are arranged in a matrix in a MOS solid-state image pick-up device, and to an associated method of readout therefrom. More particularly, the present invention relates to a MOS solid-state image pick-up device and drive method therefor, which are suitable for use, for example, in such apparatuses as visual sensors and high-speed cameras, which are required to read an amount of light incident to a photoelectrical conversion element at high speed.
2. Description of the Related Art
FIG. 9
is a circuit diagram of a MOS solid-state image pick-up device of the past, and
FIG. 10
is a signal timing diagram showing signals for the purpose of reading out amounts of light from photoelectrical conversion elements that are arranged in a matrix in the MOS solid-state image pick-up device that is shown in FIG.
9
.
First, referring to
FIG. 9
, the circuit of a prior art MOS solid-state image pick-up device will be described.
The MOS solid-state image pick-up device
100
shown in
FIG. 9
is formed by a matrix arrangement of m rows and n columns of photoelectrical conversion elements
14
(m, n), each of these photoelectrical conversion elements
14
(m, n) being formed by a photoelectrical conversion element
11
(i, j) (i=1, 2, . . . , m and j=1, 2, . . . , n) and a first enhancement-type n-channel MOS transistor
13
(i, j) (i=1, 2, . . . , m and j=1, 2, . . . , n) for the purpose of vertical switching, and the sources of which is connected to each of these photoelectrical conversion elements
11
(i, j).
The m rows and n columns of conversion elements
14
(m, n) form the photoelectrical conversion element array
10
.
Each of the gate terminals of the first vertical switching MOS transistors
13
(i, j) is commonly connected to a first signal line
15
(i) (i=1, 2, . . . , m), which is a vertical gate line
15
(i), for each one of rows, and each of the first vertical signal lines
15
(i) is connected to a vertical shift register
17
, this being the vertical scanning circuit
17
.
The drain terminals of each of the first enhancement-type n-channel MOS transistors
13
(i, j) used for vertical switching, are commonly connected to each other by a second signal line
19
(j) (j=1, 2, . . . , n), which is a vertical signal line
19
(i), for each one of columns.
Further, each of the second signal lines
19
(j), which are vertical signal lines
19
(j), is connected to a source of a second enhancement-type n-channel MOS transistor
21
(j) j=1, 2, . . . , n) used for horizontal switching, each of the drain of all these second MOS transistors
21
(j) used for horizontal switching, being commonly connected to a third signal line
23
, which is the horizontal signal output line.
The gate terminals of each of the horizontal switching second MOS transistors
21
(j) are connected to a horizontal shift register circuit
27
, which is a horizontal scanning circuit, via fourth connection lines
25
(j) (j=1, 2, . . . , n), which are horizontal gate lines. The third signal line
23
, which is the horizontal signal output line, is connected to the input of a signal amplifier
29
and to one end of a readout load resistance
31
, the other end of the readout load resistance
31
being connected to a power supply
33
that provides a constant voltage VM. The output of the signal amplifier
29
is connected to an output signal line
35
.
Next, the operation of reading out an amount of light from a MOS solid-state image pick-up device is described below, with reference being made to FIG.
9
.
First, the potential of the points of connection between each of the photoelectrical conversion elements
11
(i, j) before reading out the amount of light incident to the MOS solid-state image pick-up device and the sources of each of the MOS transistors
13
(i, j) are set to the constant voltage VM.
In this condition, when light is shined onto the image pick-up device, a photoelectric current that is proportional to the amount of light at each of the photoelectrical conversion elements
11
(i, j) is generated, resulting in the source potential of each of the first MOS transistors
13
(i, j) being reduced to below the constant voltage VM by an amount that is proportional to the amount of light.
Next, the vertical shift register circuit
17
, which acts as the vertical scanning circuit, applies a position voltage only to the first signal line
15
(i) for which i=1 of the first signal lines
15
(
1
) to
15
(m), which are vertical gate lines, which results in n first MOS transistors
13
(
1
,
1
) through
13
(
1
, n) being turned on, so as to conduct, this resulting in the source potentials of these n first MOS transistors
13
(
1
,
1
) through
13
(
1
, n) appearing at the second signal lines
19
(
1
) through
19
(n), these being the n vertical signal lines.
Next, the horizontal shift register circuit
27
, which acts as a horizontal scanning circuit, applies a positive voltage pulse sequentially to the fourth connection lines
25
(
1
) through
25
(n), these being the n horizontal gate lines, this resulting in the n horizontal switching second MOS transistors
21
(
1
) through
21
(n) being sequentially switched from on to off, so that the source potentials of the n vertical switching first MOS transistors
13
(
1
,
1
) through
13
(
1
, n) sequentially appear at the third signal line
23
, which serves as the horizontal signal output line, from the second signal lines
19
(
1
) through
19
(n), which act as vertical signal lines, via the second MOS transistors
21
(
1
) through
21
(n).
When this happens, because the third signal line
23
is, via the readout load resistance
31
, connected to the constant-voltage VM power supply
33
, a current flows into the third signal line
23
that is proportional to a voltage that has been lowered because of the incident light.
This current is converted to a voltage by the readout load resistance
31
, is amplified by the signal amplifier
29
that is connected to the third signal line
23
, and is output to the output signal line
35
. In this manner, it is possible to know the amount of light that is shined on each of the photoelectrical conversion elements
11
(
1
,
1
) through
11
(
1
, n) as a voltage value.
Next, the vertical shift register circuit
17
applies a positive voltage to only one of the first signal line, for which i=2, selected from the first signal lines
15
(
1
) through
15
(n), thereby causing the n vertical switching first MOS transistors
13
(
2
,
1
) through
13
(
2
, n) to conduct, and the above-noted procedure is repeated so as to enable the determination of the amount of light shining on the n photoelectrical conversion elements
11
(
2
,
1
) through
11
(
2
, n).
Thus, by sequentially outputting m positive voltage pulses from the vertical shift register circuit
17
to the first signal line
15
(i), and by having the horizontal shift register
27
sequentially output n positive voltage pulses during the time period in which the above-noted pulses are positive, it is possible to determine the amount of light shining on all of the photoelectrical conversion elements
11
(
1
,
1
) through (m, n).
FIG. 10
is a drawing that illustrates the operational timing of reading out the amount of light shining on the above-noted photoelectrical conversion elements
11
(
1
,
1
) through (
1
, n).
The above operation will be described using
FIG. 10. A
positive potential pulse having a pulse width Tv
37
from the vertical shift register circuit
17
is output to the first signal line
15
(
1
), which is the vertical gate line.
Pulses having the pulse width Th
39
, which change from low level to high level and then from high level to low level with a period of Wh
40
, during the period of Tv
37
in which the first signal line
15

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Solid-state image pick-up device and drive method for same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Solid-state image pick-up device and drive method for same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solid-state image pick-up device and drive method for same will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3281350

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.