Solid-state delay timed switching circuit

Communications: electrical – Systems – Timer control

Patent

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Details

307141, 3403094, G08B 100

Patent

active

040620077

ABSTRACT:
A solid-state delay timed switching circuit includes a delay timing means for delaying the start of an operational sequence. A function timing means is provided for timing the operational sequence, an alarm timing means for timing an audible alarm at the completion of an operational sequence, a power switching means, a power supply and a power turn-off means to de-energize the power switching means.

REFERENCES:
patent: 3973135 (1976-08-01), Scott

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