Solid state amplifier

Amplifiers – Signal feedback – Combined with control of bias voltage of signal amplifier

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307304, 307320, 315 52, 330 22, H03F 316

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active

039538087

ABSTRACT:
A solid state amplifier includes at least one junction field effect transistor and an impedance network coupled between a signal input terminal of the amplifier and a gate terminal of the transistor. The network includes a p-n junction device having a region of conductivity opposite to that of the gate of the transistor coupled to the gate terminal, the p-n junction being shunted by a resistor coupled in parallel therewith. The network minimizes signal distortion which would otherwise be introduced to the signal output of the amplifier when an inductive load is present in the output circuit of the amplifier.

REFERENCES:
patent: 2618690 (1952-11-01), Stuetzer
patent: 3325654 (1967-06-01), Mrazek
patent: 3351654 (1970-09-01), Eby
patent: 3501806 (1970-05-01), Gremillet
patent: 3742261 (1973-06-01), Schneider et al.
patent: 3757245 (1973-09-01), Berger
patent: 3767946 (1973-10-01), Berger et al.
Compton-"Designing with FETs in Cascode"- Edn Magazine, Sept. 14, 1966.
"Cascode Stage Using FETs"-Electronic Design, Vol. 12, p. 76, May, 1964.
Holt et al., "Hybrid Integrated Networks"- The Western Electric Engineer, Jan. 1975.

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