Solid printed substrate and electronic circuit package using the

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type

Patent

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257788, 257709, 257730, 361760, 361762, 361772, 361792, 361795, 29854, 29856, 437211, 437225, H01L 2328, H01L 2156, H05K 118, H01R 900

Patent

active

056399901

DESCRIPTION:

BRIEF SUMMARY
DESCRIPTION

A solid printed substrate, an electronic circuit package using the solid printed substrate, and a method of manufacturing the printed substrate


TECHNICAL FIELD

The present invention relates to a solid printed substrate to be used for mounting electronic parts and a method of manufacturing the same, in particular, to a solid printed substrate using a metal base substrate and a method of manufacturing the same.


BACKGROUND ART

With the advance of miniaturization or the increase of operation speed of electronic equipment, high density packaging or high speed operation of electronic circuits to be mounted on the electronic equipment has been promoted to meet the situation. Since electronic parts constituting the electronic circuits are less spaced to each other in the high density packaging, particularly with the circuit of high operative frequency, error motion of the electronic circuit due to the unwanted radiation generated from each of electronic parts becomes a subject of discussion. In order to protect the electronic circuit from the unwanted radiation or to reduce the unwanted radiation which may affects the circuit, it is required to provide measures for shielding the circuit from electromagnetic waves. Also, since power consumption generally increases in high speed operation resulting In increase of the heating value of electronic parts, packaging of the electronic parts is required to have a good heat dispersion property.
The present inventor et al. have disclosed an electronic circuit package, in the Japanese Patent Laid-open Hei4-6893 (JP, A, 4-6893) Gazette, which allows high density packaging comprising a shielding characteristic for the electromagnetic waves while having a good heat dispersion property. This electronic circuit package is made of the metal base substrate through bending or drawing operation into a soup saucer shape. By disposing the electronic circuit package on another wiring substrate with its metal base substrate side up and the opening side down in order to Joint the opening side with the wiring substrate, the unwanted radiation to be leaked from the inside of the electronic circuit package is reduced while facilitating easy dispersion of heat. Since the electronic circuit package consists of only a single layer wiring conductor formed on the metal board having an insulation layer therebetween, It is unable to sufficiently meet the case in which multiple electronic parts are mounted with requirement of high density wiring. Since it is a metal base substrate, it cannot be expected to produce a multilayer substrate by merely using the through-hole plating technique. In addition, since this electronic circuit package is formed by shallow drawing, its external size tends to become much larger when compared with its effective inside measurement. Because of this, the electronic circuit package requires an extra space when it is mounted on the other substrate thereby making it difficult to realize high density packaging.
A QFP (Quad Flat Package), DIP (Dual Inline Package) or the like has been previously known as the representative package on which electronic parts are mounted. Lead frames are used as chip carriers to be used in these packages. Recently, applicable multiple-pin type electronic parts have increased in number, and lead frames for mounting these multiple-pin type electronic parts are required to have inner and outer leads with narrower pitch distances. While, since the outer leads are formed separately outwardly projecting from the package, It is difficult to narrow the pitch distance less than some extent in order to maintain the positional precision in packaging. As to inner leads, it is also difficult to form with certainty the portion which is adjacent to each of the electronic parts when the pitch distance is too narrowed. Therefore, it is estimated difficult to produce the package of the size smaller than the present one.
In order to meet these problems which are caused when lead frames are used, Japanese Patent Laid-open Hei1-132147 (JP, A, 1-1

REFERENCES:
patent: 4445274 (1984-05-01), Suzuki et al.
patent: 4544989 (1985-10-01), Nakabu et al.
patent: 4953173 (1990-08-01), Fujitsu
patent: 5216280 (1993-06-01), Tanaka et al.
patent: 5352925 (1994-10-01), Sudoh et al.
Carlyon, "Molding, Fabricating, and Decorating," Machine Design vol. 40, No. 29, Dec. 12, 1968, p. 17.
Todd et al., "Polyimides", Machine Design, vol. 40, No. 29, Dec. 12, 1968, pp. 71-73.

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