Solid electrolytic capacitor

Electricity: electrical systems and devices – Electrolytic systems or devices – Solid electrolytic capacitor

Reexamination Certificate

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C361S528000, C361S540000

Reexamination Certificate

active

06343004

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a solid electrolytic capacitor and production method thereof that achieves a large capacitance and a low equivalent serial resistance (hereinafter, low ESR).
BACKGROUND OF THE INVENTION
Recently, the development of smaller electronic devices used at higher frequencies has been increasing. Solid electrolytic capacitors using conductive polymers as solid electrolyte have been commercialized, as capacitors suitable for such electronic devices. Since the solid electrolytic capacitors use conductive polymers of high conductivity as solid electrolyte, they achieve high frequencies characteristics and low impedance. The ESR of these solid electrolytic capacitors is much lower than that of conventional electrolytic capacitors which use electrolytic solution as driving electrolytes and that of solid electrolytic capacitors using manganese dioxide, thereby achieving an ideally large capacitance. Since these new solid electrolytic capacitors are compact, various aspects have been improved allowing them to be gradually accepted in the marketplace.
With the development of faster and larger power consuming CPUs for computers, capacitors must achieve high frequency transient response characteristics. A large capacitance and a low ESR have also become essential characteristics. For the solid electrolytic capacitors to satisfy these demands, they need to achieve a large capacitance and low ESR while occupying the smallest possible mounting area in a device.
To realize these characteristics, techniques to laminate flat capacitor elements or thin sintered elements have been used. However, if conventional solid electrolytic capacitors are used to obtain the capacitance required to backup a CPU, five to ten large-capacitance tantalum solid electrolytic capacitors need to be mounted in parallel. Such arrangement increases the mounting area occupied by the capacitors, thus limiting the reduction of the size of the equipment.
With the increasing speed of CPUs, the amount of current flowing at high frequencies has significantly increased as well. If the ESR of a capacitor is not reduced, the temperature of the capacitor will become hot, thus increasing the chance of component break down or failure. These factors heighten the necessity to develop a capacitor of large capacitance and low ESR without increasing the size of its mounting area.
In one technique to increase the capacitance of the capacitor without expanding the size of its mounting area, a plurality of sintered elements are disposed in the same external housing and connected so as to be a single capacitor. In another technique, a plurality of flat capacitor elements are stacked to produce one solid electrolytic capacitor.
However, with the technique of using the sintered elements, there is a limitation in lowering ESR due to the resistance occurring when pulling out a cathode. Such resistance cannot be avoided since one's ability to produce thinner sintered elements is limited. The solid electrolytic capacitor made of a laminate of a plurality of flat sintered elements has problems. The number of the layers cannot be increased. Because, if there is an excessive number of layers, the sintered elements are deformed due to the difference in thickness between the anode connecting section and the cathode electric conductor laminated section, dielectric oxide films crack, and a leakage current failure occurs.
The present invention aims to provide a solid electrolyte capacitor of large capacitance and low ESR and its production method by overcoming the problems mentioned above.
SUMMARY OF THE INVENTION
The solid electrolytic capacitor of the present invention is manufactured by stacking at least two capacitor element laminated units (hereinafter, laminated unit), and connecting each electrode. In other solid electrolytic capacitors of the present invention, more than two laminated units using a conductive polymer as solid electrolyte are stacked and each electrode is connected.
ESR of the solid electrolytic capacitor of the present invention can be reduced inversely proportional to the number of the stacked laminated units. Moreover, since total capacitance of the layered capacitor elements equals the capacitance of the solid electrolytic capacitor, a large capacitance and low ESR solid electrolytic capacitor can be obtained without expanding its surface mounting area.


REFERENCES:
patent: 5377073 (1994-12-01), Fukaumi et al.
patent: 5660737 (1997-08-01), Elias et al.
patent: 6081418 (2000-06-01), Kuranuki et al.
patent: 3-196608 (1991-08-01), None

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