Solid electrolyte capacitor

Electricity: electrical systems and devices – Electrolytic systems or devices – Solid electrolytic capacitor

Reexamination Certificate

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Details

C361S523000

Reexamination Certificate

active

06510045

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to solid electrolytic capacitors used in a variety of electronic devices, and particularly to those on which semiconductor devices can be directly mounted.
BACKGROUND OF THE INVENTION
A solid electrolytic capacitor of the prior art comprises a dielectric oxide layer formed on a surface of a positive electrode device consisting of a sheet of valve metal such as aluminum or tantalum, a solid electrolyte layer such as functional polymer and manganese dioxide disposed on the oxide layer, and a negative electrode layer disposed on an outer surface of the solid electrolyte layer. All of them are molded entirely thereafter by an outer molding resin, and terminal electrodes are disposed to both ends of the outer molding resin.
The above-described solid electrolytic capacitor of the prior art is a one-chip type component similar to a resistor and inductance component that is mounted on a circuit board when being used.
However, although there has been a demand for electronic components having good high frequency response according to a digitization of circuits in these days, the conventional solid electrolytic capacitors of the above kind that are surface-mounted on a circuit board together with semiconductor devices had a problem that they lower the high frequency response of the circuits.
The present invention is intended to eliminate the above problem of the prior art, and to provide solid electrolytic capacitors that can be directly bump-connected with semiconductor devices, and also has a superior high frequency response.
SUMMARY OF THE INVENTION
A solid electrolytic capacitor of the present invention comprises:
a positive electrode disposed on one side of a sheet of valve metal having a dielectric layer formed on its surfaces as well as surfaces of internal pores;
a solid electrolyte layer and a negative electrode layer disposed on the dielectric layer of valve metal;
an insulating protective layer provided on their exterior surfaces, at least one surface of this insulating protective layer is provided with a via hole extending to the positive electrode and the negative electrode layer;
a conductor connected electrically to one of the electrodes but insulated from the other provided in the via hole; and
a connecting bump disposed on the conductor exposed on the insulating protective layer for connection with a semiconductor device, a chip component, and the like.
By using the solid electrolytic capacitor of present invention, a variety of chip components including semiconductor devices can be mounted to the connecting bumps on the surface of the solid electrolytic capacitor, and a semiconductor device or a circuit having an outstanding high frequency response can be obtained.


REFERENCES:
patent: 4231075 (1980-10-01), Morimoto et al.
patent: 46-35298 (1971-10-01), None
patent: 52-27547 (1977-03-01), None
patent: 10-74668 (1998-03-01), None

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