Solder on a sloped surface

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Solder wettable contact – lead – or bond

Reexamination Certificate

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Details

C257S773000, C257S734000

Reexamination Certificate

active

06979906

ABSTRACT:
A method for depositing a solder layer or solder bump on a sloped surface. The method includes etching a sloped surface on a planar semiconductor substrate, depositing a solder-wettable layer on the sloped surface, masking the wettabler layer with a coating layer to control the position of the solder deposition, and using an organic film to prevent the solder from being deposited at regions not above either the wettable layer or the coating layer. Also, a semiconductor device structure on which a solder layer or solder bump is formed exclusively on a sloped surface.

REFERENCES:
patent: 4360142 (1982-11-01), Carpenter et al.
patent: 5492235 (1996-02-01), Crafts et al.
patent: 5736456 (1998-04-01), Akram
patent: 5880017 (1999-03-01), Schwiebert et al.
patent: 6168973 (2001-01-01), Hubbard
patent: 2002/0028338 (2002-03-01), Li et al.

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