Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2002-08-28
2004-08-17
Thai, Luan (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S666000, C257S787000
Reexamination Certificate
active
06777803
ABSTRACT:
FIELD
This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to improving the reliability of packaged integrated devices, such as by reducing delamination of packaged integrated circuits.
BACKGROUND
An integrated circuit may be subjected to many different environments during its anticipated life expectancy. Therefore, a variety of design goals have been established to help ensure that the integrated circuit will not prematurely fail because of the effects of a reasonably anticipated environment in which the integrated circuit may be used.
For example, an integrated circuit may be subjected to a relatively warm and humid environment. One mode of premature failure in such an environment is called delamination. When an integrated circuit is subjected to a high humidity for an extended period of time, the water vapor from the air tends to permeate the integrated circuit package to some extent through the interfaces of the different materials and parts that comprise the integrated circuit package.
For example, water vapor may permeate a molded integrated circuit package at the interface between a metal pin, which by necessity must exit the package so that electrical connections can be made with the packaged integrated circuit, and the molding compound that is used to encapsulate the integrated circuit. The water vapor that enters the integrated circuit package tends to preferentially travel along the interfaces between the molded packaging and other materials, causing them to lose adhesion and come apart, one from the other. In process of time, this general delamination of the integrated circuit package can lead to a premature failure of the integrated circuit.
As a more specific example, the interfaces between metallic materials and organic materials tend to delaminate more easily than the interfaces between some other types of materials. For example, organic molding compounds tend to delaminate relatively easily from gold surfaces. Unfortunately, as the size of integrated circuits has decreased, the use of gold has generally increased because of its high electrical conductivity. Further, gold is relatively easy to make electrical connections to, such as wire bonding. Therefore, it is a preferred material for structures such as the bonding rings of an integrated circuit package.
What is needed, therefore, is a system for reducing the degree of delamination between a metallic structure, such as a gold bonding ring, and an organic compound, such as an integrated circuit molding compound.
SUMMARY
The above and other needs are met by an improvement to an integrated circuit package substrate of the type that has a bonding ring with an exposed upper surface, where a first portion of the exposed upper surface is for receiving a molding compound and a second portion of the exposed upper surface is for receiving an electrical connection. A solder mask is formed on the first portion of the exposed upper surface of the bonding ring.
In this manner, the molding compound, which has a relatively low degree of adhesion to the bonding ring, does not directly contact the bonding ring. Instead, the solder mask, which has a relatively high degree of adhesion to the bonding ring, is in contact with the bonding ring. In addition, the solder mask also has a relatively high degree of adhesion to the molding compound. Thus, the adhesion in the interfaces so created tends to be greater than the adhesion between the bonding ring and the molding compound. As prior art designs tend to have a large amount of space in the bonding ring that is not used for electrical bonding, and by which the molding compound is received, this embodiment of the present invention tends to dramatically reduce the degree of delamination at the interface between the bonding ring and the molding compound.
In various preferred embodiments of the invention, the bonding ring is formed of gold. The bonding ring is preferably either a VDD ring or a VSS ring, or most preferably the bonding ring is two rings, being both a VDD ring and a VSS ring. According to another aspect of the invention there is provided a packaged integrated circuit including the improved integrated circuit package substrate. According to yet another aspect of the invention there is provided an integrated circuit package including the improved integrated circuit package substrate.
According to a further embodiment of the invention there is provided an improvement to a method of forming an integrated circuit package substrate of the type that has a bonding ring with an upper surface, where a first portion of the upper surface is for receiving a molding compound and a second portion of the exposed upper surface is for receiving an electrical connection. A solder mask is disposed on the first portion of the upper surface of the bonding ring as an interface between the first portion of the upper surface of the bonding ring and the molding compound.
REFERENCES:
patent: 6194786 (2001-02-01), Orcutt
patent: 6316828 (2001-11-01), Tao et al.
patent: 6635957 (2003-10-01), Kwan et al.
Legaspi, Jr. Severino A.
Othieno Maurice
Patei Pradip D.
Thavarajah Manickam
Thurairajaratnam Aritharan
LSI Logic Corporation
Luedeka Neely & Graham P.C.
Thai Luan
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