Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-10-07
2001-01-16
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S261000
Reexamination Certificate
active
06175085
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a solder mask configuration for a printed wiring board, and in particular to a printed wiring board with a solder mask configuration that improves breakdown voltage performance and a method for manufacturing the same.
BACKGROUND OF THE INVENTION
For the purposes of the present disclosure the term “exposed” is defined with respect to an area that is substantially free from solder mask.
During the manufacture of a printed wiring board (PWB), a liquid permanent epoxy solder mask (also called “solder resist”), which remains on the board when in use, such as conformal liquid photoimageable or screen printed mask, is generally used to protect the circuitry and provide insulation. Specifically, the solder mask serves several purposes including: 1) preventing shorts during assembly; 2) preventing shorts between conductors and metal components; 3) protecting against high voltage breakdown; and 4) protecting conductors from oxidation, contamination and mechanical damage. Solder mask is typically applied to areas of the PWB between adjacent through-hole component pads, surface-mount component lands, or vias (used to connect between PWB layers), or a combination thereof, which have exposed metal lands.
FIG. 1
shows two through-hole connector pads of a prior art PWB
10
with an area
13
(denoted by hatch marks) between the two connector pads that is covered with solder mask. Adjacent connector pads
12
a
,
12
b
are delimited by an inner perimeter
16
a
,
16
b
, defined by connector-pin holes
11
a
,
11
b
, respectively, and an outer perimeter
15
a
,
15
b
. The connector pads
12
a
,
12
b
are “exposed”, that is, the pads are not protected or covered by solder mask. Therefore, the solder mask surrounds each connector pad, and extends between adjacent connector pads, except for a relatively narrow exposed clearance area
14
a
,
14
b
proximate the outer perimeter
15
a
,
15
b
of the respective connector pad.
In some cases the spacing “d” between exposed metal surfaces, such as connectors, is dictated by the technology chosen for the product. For example, a through-hole connector system may be selected based on cost, density and electrical performance parameters. As a result, the distance “d” between exposed metal surfaces is often fixed. Signals routed through such connectors may be exposed to relatively high transient or continuous voltages. If the distance “d” is relatively small then a relatively high voltage may result in arcing between the two adjacent exposed metal surfaces, which can destroy the solder mask and cause charring or a resistive fault, thereby rendering the PWB ineffective. Arcing may occur even with relatively small increases in voltage using this PWB configuration because of the relatively short distance “d” between the exposed metal surfaces and the relatively smooth surface of the solder mask coating of the PWB between the two exposed metal surfaces.
It is therefore desirable to improve the voltage breakdown performance by increasing the distance between exposed metal surfaces and increasing the roughness of the surface of the PWB therebetween.
In a preferred embodiment of the present invention, a printed wiring board includes a first conductor pad. The inner perimeter of the first conductor pad substantially surrounds a first hole extending through the board. A first solder mask overlies a portion of the first conductor pad and extends radially outward thereof. An inner perimeter of the first solder mask is radially inward of an outer perimeter of the first conductor pad so that a portion of the first conductor pad proximate its outer perimeter is covered by the first solder mask. Furthermore, the inner perimeter of the first solder mask is radially outward of the inner perimeter of the first conductor pad so that a portion of the first conductor pad proximate its inner perimeter is left exposed.
In addition, the printed wiring board in accordance with the present invention may include a second conductor pad disposed proximate but separate from the first conductor pad. The inner perimeter of the second conductor pad substantially surrounds a second hole extending through the board. A second solder mask overlies a portion of the second conductor pad and extends radially outward thereof. The second solder mask is arranged with its inner perimeter radially inward of the outer perimeter of the second conductor pad so that a portion of the second conductor pad proximate its outer perimeter is covered by the second solder mask. Furthermore, the inner perimeter of the second solder mask is radially outward of the inner perimeter of the second conductor pad so that a portion of the second conductor pad proximate its inner perimeter is left exposed.
In addition to, or instead of, a second conductor pad, the printed wiring board in accordance with the present invention may include a conductor path and second solder mask covering at least a portion of the conductor path so that the outer perimeter of the second solder mask extends radially outward of the outer perimeter of the conductor path. It is also noted that when the PWB includes a second conductor pad and/or conductor path the solder mask outer perimeters are separated to define an exposed area therebetween.
Furthermore, the present invention is directed to a method for manufacturing the printed wiring board described in the preceding paragraphs. A first solder mask is applied to a portion of the first conductor pad. The outer perimeter of the first solder mask extends radially outward relative to the outer perimeter of the first conductor pad, and the inner perimeter of the first solder mask extends radially outward relative to the inner perimeter of the first conductor pad. In addition, a second mask may be applied to a second conductor pad in a similar manner and/or a second solder mask may be applied to a conductor path.
REFERENCES:
patent: 4991060 (1991-02-01), Kawakami et al.
patent: 5433822 (1995-07-01), Mimura et al.
patent: 5665650 (1997-09-01), Lauffer et al.
patent: 5822856 (1998-10-01), Bhatt et al.
Tippner Michael P.
Wilson Melvin Otto
Yanefski Vlademir
Darby & Darby
Gaffin Jeffrey
Lucent Technologies - Inc.
Norris Jeremy
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