Solder finishing planar leaded flat package integrated circuit l

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

118421, 118423, 118425, C23C 2600

Patent

active

052485200

ABSTRACT:
Apparatus (10) and method for solder finishing the leads of an integrated circuit package are applicable to "flat packs" or flat packages having coplanar rows of leads (84) along sides of the flat package (75). First and second tracks (22,26) are formed with elongate first and second supporting surfaces (72,74) oriented with the first and second supporting surfaces at opposite first and second downwardly depending angles (.THETA.1,.THETA.2). First and second index edges (70) are formed along the respective first and second supporting surfaces of the first and second tracks (22,26) for retaining a flat package (75) at the respective opposite first and second downwardly depending angles. Vertical first and second falling columns of molten solder are established at first and second loci of solder finishing (16a,16b) defined by solder bridge sections (66,68) with the first and second falling columns (85) located on the lower sides of the respective first and second tracks (22,26). A conveyor line (44) formed with pushers (76) pushes the flat package on the respective first and second tracks (22,26) along first and second transport paths (25,28) with respective downwardly depending first and second rows of leads (84) passing through the respective first and second tilting mechanism (100) at the transfer end of the track section lifts the flat package from the first track (22), reorients the flat package from the first downwardly depending angle (.THETA.1) to the second downwardly depending angle (.THETA.2) and deposits the flat package (75) on the second track (26).

REFERENCES:
patent: 2770875 (1956-11-01), Zimmerman
patent: 4682563 (1987-07-01), Masuda
patent: 4720396 (1988-01-01), Wood

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Solder finishing planar leaded flat package integrated circuit l does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Solder finishing planar leaded flat package integrated circuit l, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solder finishing planar leaded flat package integrated circuit l will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2189735

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.