Solder-coated articles useful for substrate attachment

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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C257S737000

Reexamination Certificate

active

06781065

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to solder-coated articles useful for substrate attachment processes, including flip-chip attachment processes.
BACKGROUND OF THE INVENTION
Flip-chip solder bonding is a popular means for providing very high density, area interconnections between a first substrate, such as a semiconductor chip, and a second substrate, such as a circuit board. Flip-chip bonding provides very attractive electrical characteristics (low inductance and capacitance) for high-speed electronic devices, and this technique provides very precise alignment and separation of components. Examples of specific applications include flip-chip bonded GaAs and silicon devices for microwave applications. These devices commonly involve a chip component and a substrate component, both of which are provided with mating arrays of solderable metallization pads (solder pads). Either or both of the chip and substrate are provided with solder bumps.
As a specific example, there has recently been an increased interest in the flip-chip attachment of GaAs MMICs in both the commercial and the defense industries.
The flip-chip technology has not only provided the above-noted superior electrical performance, but it also offers a variety of advantages from a manufacturing standpoint including the following:
Flip-chip attachment via solder bumps provides a higher wafer yield and lower cost than backside MMIC processing, for example, because, backside thinning and back via process steps are eliminated.
The die used in connection with flip-chip attachment processes are easier to handle than thinned die, resulting in higher yield.
Die attach (mechanical attachment) and electrical interconnection occur simultaneously, decreasing the required number of manufacturing steps.
Referring now to
FIG. 1
, an integrated circuit chip
2
and a substrate component
4
, both having surfaces with registering arrays of solderable metallization pads
6
,
8
, are provided. The solderable metallization pads
6
are further provided with solder bumps
10
. Referring now to
FIG. 2
, for bonding, the components
2
,
4
are first aligned to within the accuracy required for the solder bumps
10
to contact the corresponding solder pad
8
(e.g., within ½ a pad diameter). The assembly is then raised above the melting point of the selected solder under inert or reducing conditions. The solder wets the solder pads
6
,
8
and surface tension forces act to pull the two components into very accurate final alignment. The bonded assembly is then cooled to form a solidly bonded, hybrid device structure.
Conventional processes for forming solder bumps, however, typically involve photolithography, electroplating and wet chemical etching steps. Processes of the this type are not entirely satisfactory for a number of reasons, including (1) the requirement of chemical processing steps, (2) the use of numerous processing steps, and (3) high lead usage, which can lead to higher costs and adverse environmental impact.
SUMMARY OF THE INVENTION
The above and other needs in the prior art are addressed by the present invention. According to an embodiment of the invention, a solder-coated article is provided. The article comprises (1) a dielectric core having a largest dimension (i.e., the longest distance between two points on the surface of the core—for a sphere, the largest dimension is the diameter) ranging from 1 to 1000 microns; (2) a solderable metal layer over the core; and (3) a solder layer over the metal layer. Preferably, the dielectric core is a spherical core of ceramic or glass material that ranges from 25 to 200 microns in diameter. Copper and nickel are preferred materials for the solderable metal layer. The solder is preferably selected from a solder comprising lead and tin and a solder comprising lead and indium, more preferably a 63% Sn-37% Pb solder, a 95% Pb-5% Sn solder, or a 50% Pb-50% In solder.
According to another embodiment of the invention, a modified substrate is provided which comprise (1) a substrate; (2) a metalized pad on the substrate; and (3) a bump feature on the metalized pad comprising (a) a dielectric core; (b) a solderable metal layer over the core; and (c) a solder region contacting at least a portion of the solderable metal layer and at least a portion of the metalized pad. The substrate is preferably a semiconductor substrate, a ceramic substrate or a printed circuit. More preferably, the printed circuit is a printed circuit board or a flexible circuit.
According to another embodiment of the invention, a solder bonded assembly is provided comprising: (1) a first substrate comprising a first solder pad; (2) a second substrate comprising a second solder pad; (3) a dielectric core provided with a solderable metal layer and disposed between the first and second solder pads; and (4) a solder region covering at least a portion of each of (a) the first solder pad, (b) the second solder pad and (c) the solderable metal layer. The first and second substrates are preferably semiconductor substrates, ceramic substrates or printed circuits.
According to yet another embodiment of the invention, a method of providing a modified substrate is set forth. The method comprises: (1) providing a substrate comprising one or more solder pads; and (2) providing one or more bump features on the one or more solder pads, each the bump feature comprising: (a) a dielectric core; (b) a solderable metal layer over the core; and (c) a solder region covering at least a portion of the solderable metal layer and at least a portion of the solder pad. The bump feature is preferably provided by a method comprising: (1) providing one or more solder-coated articles comprising: (a) a dielectric core, (b) a solderable metal layer over the core, and (c) a solder layer over the metal layer; (2) placing the one or more solder-coated articles on the one or more solder pads; and (3) applying sufficient heat to melt the solder layer. More preferably, the dielectric core is a spherical dielectric core and, the one or more solder-coated articles are placed on the one or more solder pads by a method comprising: (1) providing a pick-up assembly comprising a block with one or more holes in communication with a vacuum, the one or more holes arranged in a configuration that corresponds to positions of the one or more solder pads; (2) placing the pick-up assembly into contact with a group of the solder-coated articles; (3) applying a vacuum such that each of the one or more holes is filled with a solder-coated article; (4) aligning the one or more solder-coated articles with the one or more solder pads; and (5) discontinuing the vacuum such that the one or more solder-coated articles are released on the one or more solder pads.
One advantage of the present invention is that solder bumps can be provided on a substrate with minimal chemical processing steps.
Another advantage is low lead use. Hence, costs and adverse environmental impact are reduced.
These and other embodiments and advantages of the present invention will become immediately apparent to those of ordinary skill in the art upon reading the description and claims to follow.


REFERENCES:
patent: 5108027 (1992-04-01), Warner et al.
patent: 5431328 (1995-07-01), Chang et al.
patent: 5838069 (1998-11-01), Itai et al.
patent: 5971253 (1999-10-01), Gilleo et al.
patent: 6087597 (2000-07-01), Shimada et al.
patent: 6278184 (2001-08-01), Brofman et al.
patent: 6337445 (2002-01-01), Abbott et al.
Copper Coated Glass Microspheres GL-0263, Data Sheet,MO-SCI Corporation, Rolla, Missouri.

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