Solder bump formation in electronics packaging

Details Solder bump formation in electronics packaging Solder bump formation in electronics packaging

2008-05-20

2008-05-20

Smith, Zandra V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S738000, C257S779000, C257SE23021

Reexamination Certificate

active

07375431

ABSTRACT:
A polymer stencil is applied to the active surface of a wafer. The stencil has openings that at least partially overlay associated metallization pads on the wafer and divider strips positioned between adjacent openings. The divider strips are arranged to overlay portions of associated metallization pads so that at least two adjacent openings overlay portions of each metallization pad. After the stencil has been positioned, a solder paste is applied to the stencil openings. The solder paste may then be reflowed with the polymer stencil remaining in place. The solder naturally creeps under the stencil so that unitary solder bumps are formed on each metallization pad. The described methods and arrangements can be used to create low profile solder bumps that are not attainable using conventional solder bump formation techniques.

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FlipChip International LLC, “Bumping Design Guide,” Jul. 2004, pp. 1-40.

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