Solder bump for flip chip assembly and method of its fabrication

Metal fusion bonding – Process – Preplacing solid filler

Patent

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Details

228254, 228208, 257738, 257781, 438617, 438627, H01L 23485

Patent

active

059063122

DESCRIPTION:

BRIEF SUMMARY
TECHNICAL FIELD

In flip-chip technology semiconductor chips are directly connected to substrates by means of solder bumps and for that reason require small mounting space only. Bumps currently used in flip-chip technology are solder bumps of homogeneous alloy materials, e.g. Pb/Sn 95/5 or eutectic compositions. The deposition of the bump metallization is carried out, for instance, by galvanic precipitation processes or by vapor deposition techniques. However, on a worldwide basis bumped chips or wafers with lead-tin solder materials are currently available from manufacturers in limited quantities only, so that gold bumps which for a long time already have been tested in TAB technology (tape automated bonding) and which have found application in a wide field, are a cost-efficient alternative. The invention is important to those fields of application in which substrate and/or contact pad materials allow using soft metal bumps which are good electrical conductors, in particular gold bumps, and corresponding solder materials , for fabricating connections, particularly flip-chip connections.


STATE OF THE ART

Gold bumps, in particular those made galvanically, are often used together with tin-containing solder materials for fabricating connections. This may lead to problems because of intermetallic phases which are formed extremely quickly with this type of paired materials. The strong reaction of the solder material, i.e. of the tin within the solder material, with the gold leads to intermetallic compounds such as AuSn, AuSn.sub.2 and AuSn.sub.4 which are brittle and adversely affect the mechanical stability as well as the electrical and thermal conductivity of the solder spots or connections. Even pores may be formed because of different diffusion coefficients (so-called Kirkendale effect) which are damaging to the reliability of the connection.
It is known from German Patent specification DE 2,032,872, that this problem may be avoided by a solderable protective layer or diffusion barrier layer or diffusion blocking layer of nickel on the gold bumps. For at a soldering temperature of about 350.degree. C., nickel neither diffuses into gold nor is it dissolved in any noticeable manner in the lead-tin solder material, and thus it acts as a solderable layer protecting the gold from attacks by the solder material. In accordance with the mentioned patent specification, galvanic gold bumps are initially cleaned in acetone. Thereafter a layer of nickel is deposited on the gold bumps by a current-free deposition process. This selective nickel deposition on the gold bumps makes additional expensive masks of the kind required, for instance, in vapor deposition processes superfluous. In addition to the layer of nickel, a soft solderable layer may for special purposes be applied by a dip process. For this purpose, tin or tin alloy or lead solder layers have proven to be advantageous. Whereas thermo-compression or ultrasonic connection techniques only may be used for gold bumps without nickel layers, gold bumps provided with a layer of nickel may also be used in flip-chip bonding. In the known process, the cleaning step of the galvanic gold bumps required for a good bonding base prior to nickel deposition is disadvantageous. This cleaning step slows down the manufacture of the diffusion barrier layer on the gold bumps and reduces the maximum production capacity.


DESCRIPTION OF THE INVENTION

Proceeding from the state of the art described supra, it is a task of the invention to provide a solder bump with particularly good bonding characteristics as well as a method of its fabrication which may be practiced easily, quickly and cost-efficiently.
A solution in accordance with this task consists of a solder bump in accordance with the characterizing elements of claim 1 and of a method of its fabrication according to claim 8. Preferred improvements are described in the subclaims.
A solder bump in accordance with the invention consists of a core on which at least one layer has been applied. The solder bump core contains a hig

REFERENCES:
patent: 5028454 (1991-07-01), Lytle et al.
patent: 5633204 (1997-05-01), Tago et al.
patent: 5683942 (1997-11-01), Kata et al.

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