Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Patent
1996-01-11
1997-06-10
Thomas, Laura
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
361767, 257738, H05K 102
Patent
active
056378327
ABSTRACT:
A method for manufacturing an electronic module comprising a substrate carrying circuitry and one or more integrated circuits and having an array of closely spaced solder balls electrically connected with terminals of the circuitry to connect the module to an array of terminals, as on printed circuit board. The array of solder balls is fabricated on the substrate by preparing the substrate to include an array of terminal pads, perforating a sheet of dielectric tape to create precise and uniform holes, and thereafter fusing the tape onto the substrate so that the holes are aligned over the substrate's terminal pads. Solder balls are then placed in the holes and heated to reflow them, so that part of the solder fills a volume defined by the holes in the dielectric tape and bonds to the terminal pads on the substrate, while the solder balls remain generally spherical above the dielectric tape. The module can then be connected to an array of terminal pads on a circuit board by positioning the ball grid array on the circuit board and again reflowing the solder balls so that they bond with the terminal pads on the circuit board.
REFERENCES:
patent: 3716907 (1973-02-01), Anderson
patent: 3719981 (1973-03-01), Steitz
patent: 4074342 (1978-02-01), Honn et al.
patent: 4604644 (1986-08-01), Beckham et al.
patent: 4783722 (1988-11-01), Osaki et al.
patent: 4788767 (1988-12-01), Desai et al.
patent: 4830264 (1989-05-01), Bitaillou et al.
patent: 4897918 (1990-02-01), Osaki et al.
patent: 4914814 (1990-04-01), Behun et al.
patent: 4932883 (1990-06-01), Hsia et al.
patent: 5060844 (1991-10-01), Behun et al.
patent: 5109601 (1992-05-01), McBride
patent: 5133495 (1992-07-01), Angulas et al.
patent: 5155905 (1992-10-01), Miller, Jr.
patent: 5162257 (1992-11-01), Yung
patent: 5203075 (1993-04-01), Angulas et al.
patent: 5255839 (1993-10-01), da Costa Alves et al.
patent: 5491301 (1996-02-01), Akiba et al.
IBM Technical Disclosure Bulletin, vol. 14, No. 9, Feb. 1972, one page.
Pacific Microelectronics Corporation
Thomas Laura
LandOfFree
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