Solar cell and method for fabricating the same

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

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C438S098000, C438S558000, C438S563000, C438S756000, C136S249000, C136S255000, C136S256000

Reexamination Certificate

active

06524880

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solar cell and a method for fabricating the solar cell using a screen-printing method.
2. Description of the Background Art
A solar cell includes a junction of an n-type and a p-type semiconductor (p-n junction). In the cell, electron-hole pairs are generated by incident light and move toward n-type and p-type region and then accumulated in two contacts. When light shining on the solar cell produces both a current and a voltage, the light-generated current and voltage can be used as electric power.
In a solar cell, n-type and p-type impurities are doped on the front and rear surface of a Si (Silicon) substrate for making a p-n junction and contacts formed on both surfaces. To fabricate a solar cell, oxide layers are formed and etched with predetermined patterns by costly photolithography process on each of the surfaces of a Si (Silicon) substrate, and impurities are doped through the patterned area. Contact layers are then formed on the patterned area.
Techniques for fabricating such a solar cell are disclosed in many articles. For example,
The range of high-efficiency silicon cells fabricated at Fraunhofer ISE
by S. W. Glunz, J. Knobloch et al, in 26
th
PVSC, 1997, pp. 231-234, or
High efficiency solar cells from FZ, CZ, and MC silicon material
by J. Knobloch, A. Noel et al, in 23rd IEEE PVSEC, 1993, pp. 271-276.
U.S. Pat. Nos. 5,258,077 issued to Shahryar for
High Efficiency Silicon Solar Cells and Method of Fabrication
and 3,988,167 issued to Kressel et. al. for
Solar Cell Device having Improved Efficiency
disclose solar cells with increased efficiency.
In the former, U.S. Pat. Nos. 5,258,077 issued to Shahryar, a groove is formed on a front surface of a textured silicon substrate by laser to enlarge contact area and reduce the contact resistance of contact, thereby improve the efficiency. In the latter, U.S. Pat. No. 3,988,167 issued to Kressel et. al., oxide layers with a plurality open areas are formed on front and rear surfaces of a Si (Silicon) substrate, and contacts are formed on the open area. The rear contact is formed of a material that can enhance the light absorption, thereby improving the efficiency.
However, the above techniques use several photo-etching processes, which is costly and time-consuming.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a technique for fabricating a solar cell that can simplify the manufacturing process and minimize the manufacturing costs by forming a doped layer on a substrate using a screen printing process.
It is another object to increase the efficiency of a solar cell.
It is yet another object to avoid the use of the costly photo-etching process to fabricate a solar cell.
To achieve the above objects, the present invention provides a technique for fabricating a solar cell. n
+
emitter layers are formed on a front surface of a p-type substrate. Dielectric layers, SiO
2
(silicon dioxide) for surface passivation are formed on the front and rear surfaces of the substrate. On the SiO
2
layers, n-type dopant source is printed on the front surface and p-type dopant source is printed on the rear surface. Both dopant sources are only printed on the area which will be patterned for forming a metal contact. At high temperature, both sources diffuse into the substrate, thereby forming heavily doped n
++
layers on the front surfaces and a heavily doped p
++
layers on the rear surface. The SiO
2
layers are etched away in chemical etching solution. The dopant printed SiO
2
layers are removed and the other SiO
2
layers remain. The removed areas on both heavily doped layers are used as patterns for metal contact. Front and rear contacts are formed.
Preferably, the front and rear contact patterns are formed by wet-etching PSG (phosphosilicate glass) and BSG (borosilicate or boronsilicate glass) layers formed on the front and rear insulating layers during the step of diffusing both printed dopant sources.
Further preferably, the front and rear contacts are formed at the same time. The front and rear contacts are formed by one of either a electroless plating method or an electroplating method. The front and rear insulating layers are formed through a thermal-oxidation process.
Further, preferably, the thickness of insulating layers is thinner than 800 Å (Angstroms).
According to another aspect, the present invention provides high-efficiency by including selective emitter, both n
+
emitter and n
++
layer under the front metal contact, and back surface field (BSF) layer under the rear metal contact.


REFERENCES:
patent: 4070689 (1978-01-01), Coleman et al.
patent: 4104091 (1978-08-01), Evans et al.
patent: 6071753 (2000-06-01), Arimoto
patent: 6280651 (2001-08-01), Wojtczak et al.
patent: 6291763 (2001-09-01), Nakamura
Zhao et al. “Improved Efficiency Silicon Solar Cell Module” IEEE Electron Device Letters, vol. 18, No. 2, Feb. 1997. pp. 48-50.

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