Semiconductor device manufacturing: process – Repair or restoration
Reexamination Certificate
2005-11-29
2005-11-29
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Repair or restoration
C438S466000, C438S469000, C438S149000
Reexamination Certificate
active
06969618
ABSTRACT:
The present invention provides a novel method for increasing the amount of deuterium incorporated into trap sites of a transistor device during a deuterium passivation anneal by electrically pre-stressing the fabricated device prior to a deuterium anneal. The method of the present invention equally applies to SOI and CMOS technology. As a result, the incorporation of more deuterium during a deuterium anneal in the process flow reduces the number of undesirable trap sites.
REFERENCES:
patent: 5999011 (1999-12-01), Chu et al.
patent: 6147014 (2000-11-01), Lyding et al.
patent: 6194282 (2001-02-01), Niimi et al.
patent: 6198301 (2001-03-01), Chetlur et al.
patent: 6445630 (2002-09-01), Ayadi et al.
patent: 2002/0031920 (2002-03-01), Lyding et al.
patent: 2002/0047169 (2002-04-01), Kunikiyo
patent: 2002/0132493 (2002-09-01), Watt et al.
patent: 2002/0177290 (2002-11-01), Ramkumar et al.
Chen et al., “Deuterium Isotope Effect for AC and DC Hot-Carrier Degradation of MOS Transistors: A Comparison Study”, Apr. 2001, IEEE Transactions on Electron Devices, vol. 48, pp. 813-815.
Chen et al., “On the Mechanism for Interface Trap Generation in MOS Transistors Due to Channel Hot Carrier Stressing”, Jan. 2000. IEEE Electron Device Letters, vol. 21 No. 1, pp. 24-26.
Cheng et al., “Separation of Hot-Carrier-Induced Interface Trap Creation and Oxide Charge Trapping in PMOSFETs Studied by Hydrogen/Deuterium Isotope Effect”, Apr. 2001, IEEE Electron Device Letters, vol. 22 No. 4, pp. 188-190.
Hess et al., “An Alternative Interpretation of Hot Electron Interface Degradation in NMOSFET's: Isotope Results Irreconcilable with Major Defect Generation by Holes?”, Sep. 1999, IEEE Transactions on Electron Devices, vol. 46 No. 9, pp. 1914-1916.
LandOfFree
SOI device having increased reliability and reduced free... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with SOI device having increased reliability and reduced free..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SOI device having increased reliability and reduced free... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3496064