Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Non-single crystal – or recrystallized – material forms active...
Reexamination Certificate
1998-09-22
2001-05-01
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Non-single crystal, or recrystallized, material forms active...
C257S066000, C257S335000, C257S347000
Reexamination Certificate
active
06225643
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a silicon on insulator (SOI) cell for power components having at least one insulator layer provided in a semiconductor body. A polycrystalline zone doped with a dopant of a first conductivity type is grown on the at least one insulator layer. The invention also relates to a method for producing such an SOI cell.
A semiconductor component controllable by a field effect is described in Published, Non-Prosecuted, German Patent Application DE 41 13 756 A1, in which an insulator layer adjoins a source zone and is disposed between the source zone and the main face opposite the source zone of the semiconductor body. The insulator layer is intended to prevent the undesired activation of parasitic bipolar structures.
From U.S. Pat. No. 5,396,087, an Insulated Gate Bipolar Transistor (IGBT) is known, in which an insulator layer embedded in the semiconductor body is intended to prevent electrical conduction between a base region and the field effect transistor and in particular to prevent an injection of minority charge carriers from the base region into the source of the field effect transistor.
It is accordingly familiar to one skilled in the art that thin insulator layers under a n
+
zone, for instance, can increase the reliability and robustness of MOSFET and IGBT cells. It is also known that sealing off an IGBT cell with an insulator layer in the direction of an n
−
-conducting drain zone reduces the voltage drop in the on state, as is also the case for a so-called trench cell.
In general, however, the production of an embedded insulator layer is complicated and expensive and requires complicated process steps such as in the so-called SIMOX process or the direct wafer bonding process.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a SOI cell and method for producing it, which overcome the above-mentioned disadvantages of the prior art methods and devices of this general type, and which can be produced in a simple, inexpensive manner.
With the foregoing and other objects in view there is provided, in accordance with the invention, a silicon on insulator (SOI) cell, including: a semiconductor body; at least one insulator layer disposed in the semiconductor body and having an edge; a polycrystalline zone doped with a dopant of a first conductivity type grown on the at least one insulator layer; and a semiconductor region adjoining the polycrystalline zone and located outside a region of the at least one insulator layer or just inside the edge of the at least one insulator layer, the semiconductor region doped with the dopant of the first conductivity type by diffusion from the polycrystalline zone.
The object is attained in an SOI cell of the type recited at the outset according to the invention in that adjoining the polycrystalline zone, which has been grown over the buried insulator layer, in a semiconductor region, located outside the region of the insulator layer or just inside the edge of the insulator layer, and the semiconductor region is doped by diffusion from the polycrystalline zone with the dopant of the first conductivity type.
The SOI cell of the invention is also distinguished in that a dopant source having a dopant of a second conduction type, opposite the first, is introduced into the semiconductor body by ion implantation. Optionally, the dopant source is disposed in the semiconductor body above a further insulator layer. The semiconductor region located outside the region of the insulator layer and doped with the dopant of the first conduction type is preferably n-conducting. Accordingly, the dopant source is doped with p-conducting dopant, such as boron.
Upon a heat treatment, the n dopant, such as phosphorus, thus leaves the polycrystalline zone above the insulator layer by diffusion and penetrates the adjacent monocrystalline semiconductor material, where it forms an n-conducting zone. The p dopant is made to practically “float away” from the dopant source as a consequence of its substantially higher coefficient of diffusion, so that a substantially more-extensive p zone is created in the monocrystalline semiconductor material of the otherwise n-conducting semiconductor body. An npn structure with an SOI cell can thus be created in a relatively simple way.
The dopant source can be provided for instance beneath an insulator layer or between two insulator layers, that is, above a further insulator layer, as noted above. In the first instance, the dopant source is located in the monocrystalline semiconductor material, while in the second case it is disposed in the polycrystalline semiconductor material.
An essential feature of the invention is that the semiconductor region of the first conduction type, created by the diffusion out of the polycrystalline layer above the insulator layer, which region is optionally augmented with a semiconductor zone of the other conduction type created with the dopant source.
In accordance with an added feature of the invention, the polycrystalline zone is implanted with arsenic in a dose of approximately 10
15
cm
−2
.
In accordance with an additional feature of the invention, the first insulator layer and the second insulator layer are made from a material selected from the group consisting of silicon dioxide and silicon nitride.
In accordance with another feature of the invention, the first insulator layer and the second insulator layer have a layer thickness of approximately 40 nm.
In accordance with a further added feature of the invention, one of the first insulator layer and the second insulator layer is completely buried under the other of the first insulator layer and the second insulator layer.
In accordance with a further additional feature of the invention, the polycrystalline zone has a layer thickness of approximately 1 &mgr;m.
In accordance with yet another feature of the invention, there is a further polycrystalline zone disposed on the second insulator layer and having a layer thickness of approximately 1 &mgr;m.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing an SOI cell, which includes: forming a semiconductor body; applying an insulator layer on the semiconductor body; growing a monocrystalline layer on the semiconductor body; growing a polycrystalline zone on the insulator layer; implanting the polycrystalline zone with a dopant of a first conductivity type; and heat-treating the polycrystalline zone for laterally diffusing the dopant out of the polycrystalline zone into the monocrystalline layer for forming a doped monocrystalline zone in the monocyrstalline layer.
In accordance with a concomitant feature of the invention, there are the steps of forming a dopant source with a dopant of a second conductivity type, opposite the first conductivity type, in the semiconductor body before the heat-treating step; and diffusing out of the dopant source the dopant of the second conductivity type into the monocrystalline layer during the heat-treating step.
In the method for producing the SOI cell, so-called marker insulator layers of silicon dioxide or silicon nitride are applied in structured form to a n-conducting semiconductor body for instance, optionally also an n
+
-n
−
-conducting semiconductor body or a p
+
-n-conducting semiconductor body for IGBTs. A p
+
dopant source is also implanted in the semiconductor body.
Next, onto the thus-treated semiconductor body, a thin epitaxial layer is applied, with a layer thickness of approximately 0.1 to 2 &mgr;m. In the process, polycrystalline silicon grows above the marker insulator layers. Outside the layers, however, the silicon is deposited in monocrystalline form.
Next, the polycrystalline silicon, optionally after structuring, is provided with n dopant by implantation. Because of the high diffusion speed a virtually uniform dopant concentration occurs.
After the diffusion of the n dopant out of the polycrystalline silicon into the adjacent monocrysta
Strack Helmut
Tihanyi Jenoe
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
Ngo Ngan V.
Stemer Werner H.
LandOfFree
SOI cell and method for producing it does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with SOI cell and method for producing it, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and SOI cell and method for producing it will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2480305